Commit 671bc17f authored by Frank Li's avatar Frank Li Committed by Vinod Koul
Browse files

dt-bindings: fsl-qdma: Convert to yaml format 



Convert binding doc from txt to yaml.

Re-order interrupt-names to align example.
Add #dma-cell in example.
Change 'reg' in example to 32bit address.

Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240528163734.2471268-1-Frank.Li@nxp.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent bb160502

Documentation/devicetree/bindings/dma/fsl-qdma.txt

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NXP Layerscape SoC qDMA Controller

==================================



This device follows the generic DMA bindings defined in dma/dma.txt.



Required properties:



- compatible:		Must be one of

			 "fsl,ls1021a-qdma": for LS1021A Board

			 "fsl,ls1028a-qdma": for LS1028A Board

			 "fsl,ls1043a-qdma": for ls1043A Board

			 "fsl,ls1046a-qdma": for ls1046A Board

- reg:			Should contain the register's base address and length.

- interrupts:		Should contain a reference to the interrupt used by this

			device.

- interrupt-names:	Should contain interrupt names:

			 "qdma-queue0": the block0 interrupt

			 "qdma-queue1": the block1 interrupt

			 "qdma-queue2": the block2 interrupt

			 "qdma-queue3": the block3 interrupt

			 "qdma-error":  the error interrupt

- fsl,dma-queues:	Should contain number of queues supported.

- dma-channels:	Number of DMA channels supported

- block-number:	the virtual block number

- block-offset:	the offset of different virtual block

- status-sizes:	status queue size of per virtual block

- queue-sizes:		command queue size of per virtual block, the size number

			based on queues



Optional properties:



- dma-channels:		Number of DMA channels supported by the controller.

- big-endian:		If present registers and hardware scatter/gather descriptors

			of the qDMA are implemented in big endian mode, otherwise in little

			mode.



Examples:



	qdma: dma-controller@8390000 {

			compatible = "fsl,ls1021a-qdma";

			reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */

			      <0x0 0x8389000 0x0 0x1000>, /* Status regs */

			      <0x0 0x838a000 0x0 0x2000>; /* Block regs */

			interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "qdma-error",

				"qdma-queue0", "qdma-queue1";

			dma-channels = <8>;

			block-number = <2>;

			block-offset = <0x1000>;

			fsl,dma-queues = <2>;

			status-sizes = <64>;

			queue-sizes = <64 64>;

			big-endian;

		};



DMA clients must use the format described in dma/dma.txt file.

Documentation/devicetree/bindings/dma/fsl-qdma.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NXP Layerscape SoC qDMA Controller



maintainers:

  - Frank Li <Frank.Li@nxp.com>



properties:

  compatible:

    enum:

      - fsl,ls1021a-qdma

      - fsl,ls1028a-qdma

      - fsl,ls1043a-qdma

      - fsl,ls1046a-qdma



  reg:

    items:

      - description: Controller regs

      - description: Status regs

      - description: Block regs



  interrupts:

    minItems: 2

    maxItems: 5



  interrupt-names:

    minItems: 2

    items:

      - const: qdma-error

      - const: qdma-queue0

      - const: qdma-queue1

      - const: qdma-queue2

      - const: qdma-queue3



  dma-channels:

    minimum: 1

    maximum: 64



  fsl,dma-queues:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Should contain number of queues supported.

    minimum: 1

    maximum: 4



  block-number:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: the virtual block number



  block-offset:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: the offset of different virtual block



  status-sizes:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: status queue size of per virtual block



  queue-sizes:

    $ref: /schemas/types.yaml#/definitions/uint32-array

    description:

      command queue size of per virtual block, the size number

      based on queues



  big-endian:

    $ref: /schemas/types.yaml#/definitions/flag

    description:

      If present registers and hardware scatter/gather descriptors

      of the qDMA are implemented in big endian mode, otherwise in little

      mode.



required:

  - compatible

  - reg

  - interrupts

  - interrupt-names

  - fsl,dma-queues

  - block-number

  - block-offset

  - status-sizes

  - queue-sizes



allOf:

  - $ref: dma-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - fsl,ls1021a-qdma

    then:

      properties:

        interrupts:

          maxItems: 3

        interrupt-names:

          maxItems: 3



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    dma-controller@8390000 {

        compatible = "fsl,ls1021a-qdma";

        reg = <0x8388000 0x1000>, /* Controller regs */

              <0x8389000 0x1000>, /* Status regs */

              <0x838a000 0x2000>; /* Block regs */

        interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

        interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1";

        #dma-cells = <1>;

        dma-channels = <8>;

        block-number = <2>;

        block-offset = <0x1000>;

        status-sizes = <64>;

        queue-sizes = <64 64>;

        big-endian;

        fsl,dma-queues = <2>;

    };