Commit 67ad5b9b authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Drop force_check_qgv 



Remove the force_check_qgv flag and just fill the pipe_sagv_reject
bitmask properly during readout. This will cause the initial commit
to re-enable SAGV if possible.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250326162544.3642-9-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent da1c27e4

drivers/gpu/drm/i915/display/intel_bw.c

+6 −6
Original line number Diff line number Diff line
@@ -1435,9 +1435,8 @@ int intel_bw_atomic_check(struct intel_atomic_state *state) 
	new_bw_state = intel_atomic_get_new_bw_state(state);



	if (new_bw_state &&

	    (intel_can_enable_sagv(i915, old_bw_state) !=

	     intel_can_enable_sagv(i915, new_bw_state) ||

	     new_bw_state->force_check_qgv))

	    intel_can_enable_sagv(i915, old_bw_state) !=

	    intel_can_enable_sagv(i915, new_bw_state))

		changed = true;



	/*
@@ -1451,8 +1450,6 @@ int intel_bw_atomic_check(struct intel_atomic_state *state) 
	if (ret)

		return ret;



	new_bw_state->force_check_qgv = false;



	return 0;

}
@@ -1466,7 +1463,6 @@ static void intel_bw_crtc_update(struct intel_bw_state *bw_state, 
		intel_bw_crtc_data_rate(crtc_state);

	bw_state->num_active_planes[crtc->pipe] =

		intel_bw_crtc_num_active_planes(crtc_state);

	bw_state->force_check_qgv = true;



	drm_dbg_kms(display->drm, "pipe %c data rate %u num active planes %u\n",

		    pipe_name(crtc->pipe),
@@ -1484,6 +1480,7 @@ void intel_bw_update_hw_state(struct intel_display *display) 
		return;



	bw_state->active_pipes = 0;

	bw_state->pipe_sagv_reject = 0;



	for_each_intel_crtc(display->drm, crtc) {

		const struct intel_crtc_state *crtc_state =
@@ -1497,6 +1494,9 @@ void intel_bw_update_hw_state(struct intel_display *display) 
			intel_bw_crtc_update(bw_state, crtc_state);



		skl_crtc_calc_dbuf_bw(&bw_state->dbuf_bw[pipe], crtc_state);



		/* initially SAGV has been forced off */

		bw_state->pipe_sagv_reject |= BIT(pipe);

	}

}

drivers/gpu/drm/i915/display/intel_bw.h

+0 −6
Original line number Diff line number Diff line
@@ -48,12 +48,6 @@ struct intel_bw_state { 
	 */

	u16 qgv_points_mask;



	/*

	 * Flag to force the QGV comparison in atomic check right after the

	 * hw state readout

	 */

	bool force_check_qgv;



	unsigned int data_rate[I915_MAX_PIPES];

	u8 num_active_planes[I915_MAX_PIPES];

};