Commit 67e38874 authored by Alvin Lee's avatar Alvin Lee Committed by Alex Deucher
Browse files

drm/amd/display: Increase num voltage states to 40 



[Description]
If during driver init stage there are greater than 20
intermediary voltage states while constructing the SOC
BB we could hit issues because we will index outside of the
clock_limits array and start overwriting data. Increase the
total number of states to 40 to avoid this issue.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: default avatarSamson Tam <samson.tam@amd.com>
Acked-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9976421f

drivers/gpu/drm/amd/display/dc/dml/dc_features.h

+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ 
 * Define the maximum amount of states supported by the ASIC. Every ASIC has a

 * specific number of states; this macro defines the maximum number of states.

 */

#define DC__VOLTAGE_STATES 20

#define DC__VOLTAGE_STATES 40

#define DC__NUM_DPP__4 1

#define DC__NUM_DPP__0_PRESENT 1

#define DC__NUM_DPP__1_PRESENT 1