Commit 67ea53a4 authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

drm/amd/display: Disable DCN401 UCLK P-State support on full updates 



[WHY&HOW]
It is not guaranteed even for HW exclusive P-State methods (like
VActive) that P-state will be supported properly until optimize
bandwidth is called, so unconditionally disable it on full updates.

Reviewed-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Signed-off-by: default avatarDillon Varone <dillon.varone@amd.com>
Signed-off-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cc299120

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

+3 −3
Original line number Diff line number Diff line
@@ -1401,8 +1401,8 @@ void dcn401_prepare_bandwidth(struct dc *dc, 
	bool p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support;

	unsigned int compbuf_size_kb = 0;



	/* Any transition into or out of a FAMS config should disable MCLK switching first to avoid hangs */

	if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {

	/* Any transition into P-State support should disable MCLK switching first to avoid hangs */

	if (p_state_change_support) {

		dc->optimized_required = true;

		context->bw_ctx.bw.dcn.clk.p_state_change_support = false;

	}
@@ -1441,7 +1441,7 @@ void dcn401_prepare_bandwidth(struct dc *dc, 
		dcn401_fams2_global_control_lock(dc, context, false);

	}



	if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {

	if (p_state_change_support != context->bw_ctx.bw.dcn.clk.p_state_change_support) {

		/* After disabling P-State, restore the original value to ensure we get the correct P-State

		 * on the next optimize. */

		context->bw_ctx.bw.dcn.clk.p_state_change_support = p_state_change_support;