Commit 683192d7 authored by Fabio Estevam's avatar Fabio Estevam Committed by Heiko Stuebner
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ARM: dts: rockchip: Add Onion Omega4 Evaluation Board 

The Onion Omega4 Evaluation Board is based on the RV1103B SoC and has:

 - 256 MB of RAM
 - 256 MB of SPI-NAND
 - Ethernet
 - USB OTG
 - Wifi
 - SD card
 - Camera connector

The details can be found at:
https://documentation.onioniot.com/omega4/getting-started/



Add the initial support for this board so that it can fully boot into
Linux with the root file system stored in the SPI NAND.

Signed-off-by: default avatarFabio Estevam <festevam@nabladev.com>
Link: https://patch.msgid.link/20260313131058.708361-4-festevam@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 2ea01fbb

arch/arm/boot/dts/rockchip/Makefile

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# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_ROCKCHIP) += \

	rv1103b-omega4-evb.dtb \

	rv1108-elgin-r1.dtb \

	rv1108-evb.dtb \

	rv1109-relfor-saib.dtb \

arch/arm/boot/dts/rockchip/rv1103b-omega4-evb.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.

 * Copyright (c) 2025 plan44.ch/luz

 * Copyright (c) 2026 Onion Corporation

 */



/dts-v1/;



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/leds/common.h>

#include "rv1103b-omega4.dtsi"



/ {

	model = "Onion Omega4 Evaluation Board";

	compatible = "onion,omega4-evb", "onion,omega4", "rockchip,rv1103b";



	aliases {

		serial0 = &uart0;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	leds {

		compatible = "gpio-leds";



		led-0	{

			color = <LED_COLOR_ID_BLUE>;

			default-state = "on";

			function = LED_FUNCTION_STATUS;

			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;

			label = "sys";

			pinctrl-names = "default";

			pinctrl-0 = <&led>;

		};

	};

};



&fspi0 {

	status = "okay";

};



&pinctrl {

	leds {

		led: led {

			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};

};



&sdmmc0 {

	status = "okay";

};



&sdmmc1 {

	status = "okay";

};



&uart0 {

	status = "okay";

};

arch/arm/boot/dts/rockchip/rv1103b-omega4.dtsi

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.

 * Copyright (c) 2025 plan44.ch/luz

 * Copyright (c) 2026 Onion Corporation

 */



/dts-v1/;



#include "rv1103b.dtsi"



/ {

	sdio_pwrseq: sdio-pwrseq {

		compatible = "mmc-pwrseq-simple";

		pinctrl-names = "default";

		pinctrl-0 = <&wifi_enable_h>;

		post-power-on-delay-ms = <300>;

		reset-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;

	};



	vcc3v3_sd: vcc3v3-sd {

		compatible = "regulator-fixed";

		gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;

		pinctrl-names = "default";

		pinctrl-0 = <&sdmmc_pwren>;

		regulator-name = "vcc3v3_sd";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};



	vccio_sd: vccio-sd {

		compatible = "regulator-gpio";

		gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&sdmmc_volt>;

		regulator-name = "vccio_sd";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;

		states = <3300000 1 1800000 0>;

	};

};



&uart0 {

	bootph-all;

	pinctrl-names = "default";

	pinctrl-0 = <&uart0m0_xfer>;

};



&fspi0 {

	spi_nand: flash@0 {

		compatible = "spi-nand";

		reg = <0>;

		bootph-pre-ram;

		bootph-some-ram;

		spi-max-frequency = <75000000>;

		spi-rx-bus-width = <4>;

		spi-tx-bus-width = <1>;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				reg = <0x00000000 0x00040000>;

				label = "env";

			};



			partition@40000 {

				reg = <0x00040000 0x00100000>;

				label = "idblock";

				read-only;

			};



			partition@140000 {

				reg = <0x00140000 0x00100000>;

				label = "uboot";

				read-only;

			};



			partition@240000 {

				reg = <0x00240000 0x00800000>;

				label = "boot";

			};



			partition@a40000 {

				reg = <0x00a40000 0x0f5c0000>;

				label = "ubi";

			};

		};

	};

};



&sdmmc0 {

	bus-width = <4>;

	cap-mmc-highspeed;

	cap-sd-highspeed;

	disable-wp;

	no-sdio;

	no-mmc;

	sd-uhs-sdr104;

	vmmc-supply = <&vcc3v3_sd>;

	vqmmc-supply = <&vccio_sd>;

	status = "disabled";

};



&sdmmc1 {

	bus-width = <4>;

	cap-sd-highspeed;

	cap-sdio-irq;

	keep-power-in-suspend;

	mmc-pwrseq = <&sdio_pwrseq>;

	no-sd;

	no-mmc;

	non-removable;

	pinctrl-names = "default";

	pinctrl-0 = <&sdmmc1_cmd &sdmmc1_clk &sdmmc1_bus4>;

	status = "disabled";

};



&pinctrl {

	sdio-pwrseq {

		/omit-if-no-ref/

		wifi_enable_h: wifi-enable-h {

			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	sdmmc {

		/omit-if-no-ref/

		sdmmc_pwren: sdmmc-pwren {

			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;

		};



		/omit-if-no-ref/

		sdmmc_volt: sdmmc-volt {

			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	wireless-wlan {

		/omit-if-no-ref/

		wifi_host_wake_irq: wifi-host-wake-irq {

			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};

};