Commit 683645a2 authored by Geetha sowjanya's avatar Geetha sowjanya Committed by David S. Miller
Browse files

octeontx2-af: Add packet path between representor and VF 



Current HW, do not support in-built switch which will forward pkts
between representee and representor. When representor is put under
a bridge and pkts needs to be sent to representee, then pkts from
representor are sent on a HW internal loopback channel, which again
will be punted to ingress pkt parser. Now the rules that this patch
installs are the MCAM filters/rules which will match against these
pkts and forward them to representee.
The rules that this patch installs are for basic
representor <=> representee path similar to Tun/TAP between VM and
Host.

Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 22f85879

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+8 −0
Original line number Diff line number Diff line
@@ -145,6 +145,7 @@ M(LMTST_TBL_SETUP, 0x00a, lmtst_tbl_setup, lmtst_tbl_setup_req, \ 
M(SET_VF_PERM,		0x00b, set_vf_perm, set_vf_perm, msg_rsp)	\

M(PTP_GET_CAP,		0x00c, ptp_get_cap, msg_req, ptp_get_cap_rsp)	\

M(GET_REP_CNT,		0x00d, get_rep_cnt, msg_req, get_rep_cnt_rsp)	\

M(ESW_CFG,		0x00e, esw_cfg, esw_cfg_req, msg_rsp)	\

/* CGX mbox IDs (range 0x200 - 0x3FF) */				\

M(CGX_START_RXTX,	0x200, cgx_start_rxtx, msg_req, msg_rsp)	\

M(CGX_STOP_RXTX,	0x201, cgx_stop_rxtx, msg_req, msg_rsp)		\
@@ -1533,6 +1534,12 @@ struct get_rep_cnt_rsp { 
	u64 rsvd;

};



struct esw_cfg_req {

	struct mbox_msghdr hdr;

	u8 ena;

	u64 rsvd;

};



struct flow_msg {

	unsigned char dmac[6];

	unsigned char smac[6];
@@ -1571,6 +1578,7 @@ struct flow_msg { 
	u8 icmp_type;

	u8 icmp_code;

	__be16 tcp_flags;

	u16 sq_id;

};



struct npc_install_flow_req {

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+7 −1
Original line number Diff line number Diff line
@@ -598,6 +598,7 @@ struct rvu { 
	u16			rep_pcifunc;

	int			rep_cnt;

	u16			*rep2pfvf_map;

	u8			rep_mode;

};



static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
@@ -1062,7 +1063,8 @@ int rvu_ndc_fix_locked_cacheline(struct rvu *rvu, int blkaddr); 
/* RVU Switch */

void rvu_switch_enable(struct rvu *rvu);

void rvu_switch_disable(struct rvu *rvu);

void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc);

void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);

void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool ena);



int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,

			   u64 pkind, u8 var_len_off, u8 var_len_off_mask,
@@ -1075,4 +1077,8 @@ int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc); 
void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena);

void rvu_mcs_exit(struct rvu *rvu);



/* Representor APIs */

int rvu_rep_pf_init(struct rvu *rvu);

int rvu_rep_install_mcam_rules(struct rvu *rvu);

void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);

#endif /* RVU_H */

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c

+3 −0
Original line number Diff line number Diff line
@@ -1500,6 +1500,9 @@ static int rvu_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode) 
	struct rvu *rvu = rvu_dl->rvu;

	struct rvu_switch *rswitch;



	if (rvu->rep_mode)

		return -EOPNOTSUPP;



	rswitch = &rvu->rswitch;

	*mode = rswitch->mode;

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+3 −4
Original line number Diff line number Diff line
@@ -2774,7 +2774,7 @@ void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc, 
	int schq;

	u64 cfg;



	if (!is_pf_cgxmapped(rvu, pf))

	if (!is_pf_cgxmapped(rvu, pf) && !is_rep_dev(rvu, pcifunc))

		return;



	cfg = enable ? (BIT_ULL(12) | RVU_SWITCH_LBK_CHAN) : 0;
@@ -4407,8 +4407,6 @@ int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu, 
	if (test_bit(PF_SET_VF_TRUSTED, &pfvf->flags) && from_vf)

		ether_addr_copy(pfvf->default_mac, req->mac_addr);



	rvu_switch_update_rules(rvu, pcifunc);



	return 0;

}
@@ -5198,7 +5196,7 @@ int rvu_mbox_handler_nix_lf_start_rx(struct rvu *rvu, struct msg_req *req, 
	pfvf = rvu_get_pfvf(rvu, pcifunc);

	set_bit(NIXLF_INITIALIZED, &pfvf->flags);



	rvu_switch_update_rules(rvu, pcifunc);

	rvu_switch_update_rules(rvu, pcifunc, true);



	return rvu_cgx_start_stop_io(rvu, pcifunc, true);

}
@@ -5226,6 +5224,7 @@ int rvu_mbox_handler_nix_lf_stop_rx(struct rvu *rvu, struct msg_req *req, 
	if (err)

		return err;



	rvu_switch_update_rules(rvu, pcifunc, false);

	rvu_cgx_tx_enable(rvu, pcifunc, true);



	return 0;

drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -445,6 +445,7 @@ 


#define NIX_CONST_MAX_BPIDS		GENMASK_ULL(23, 12)

#define NIX_CONST_SDP_CHANS		GENMASK_ULL(11, 0)

#define NIX_VLAN_ETYPE_MASK		GENMASK_ULL(63, 48)



#define NIX_AF_MDQ_PARENT_MASK         GENMASK_ULL(24, 16)

#define NIX_AF_TL4_PARENT_MASK         GENMASK_ULL(23, 16)