Commit 68b89e23 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-gt-next-2024-04-26' of... 

Merge tag 'drm-intel-gt-next-2024-04-26' of https://anongit.freedesktop.org/git/drm/drm-intel into drm-next

UAPI Changes:

- drm/i915/guc: Use context hints for GT frequency

    Allow user to provide a low latency context hint. When set, KMD
    sends a hint to GuC which results in special handling for this
    context. SLPC will ramp the GT frequency aggressively every time
    it switches to this context. The down freq threshold will also be
    lower so GuC will ramp down the GT freq for this context more slowly.
    We also disable waitboost for this context as that will interfere with
    the strategy.

    We need to enable the use of SLPC Compute strategy during init, but
    it will apply only to contexts that set this bit during context
    creation.

    Userland can check whether this feature is supported using a new param-
    I915_PARAM_HAS_CONTEXT_FREQ_HINT. This flag is true for all guc submission
    enabled platforms as they use SLPC for frequency management.

    The Mesa usage model for this flag is here -
    https://gitlab.freedesktop.org/sushmave/mesa/-/commits/compute_hint

- drm/i915/gt: Enable only one CCS for compute workload

    Enable only one CCS engine by default with all the compute sices
    allocated to it.

    While generating the list of UABI engines to be exposed to the
    user, exclude any additional CCS engines beyond the first
    instance

    ***

    NOTE: This W/A will make all DG2 SKUs appear like single CCS SKUs by
    default to mitigate a hardware bug. All the EUs will still remain
    usable, and all the userspace drivers have been confirmed to be able
    to dynamically detect the change in number of CCS engines and adjust.

    For the smaller percent of applications that get perf benefit from
    letting the userspace driver dispatch across all 4 CCS engines we will
    be introducing a sysfs control as a later patch to choose 4 CCS each
    with 25% EUs (or 50% if 2 CCS).

    NOTE: A regression has been reported at

    https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10895

    However Andi has been triaging the issue and we're closing in a fix
    to the gap in the W/A implementation:

    https://lists.freedesktop.org/archives/intel-gfx/2024-April/348747.html



Driver Changes:

- Add new and fix to existing workarounds: Wa_14018575942 (MTL),
  Wa_16019325821 (Gen12.70), Wa_14019159160 (MTL), Wa_16015675438,
  Wa_14020495402 (Gen12.70) (Tejas, John, Lucas)
- Fix UAF on destroy against retire race and remove two earlier
  partial fixes (Janusz)
- Limit the reserved VM space to only the platforms that need it (Andi)
- Reset queue_priority_hint on parking for execlist platforms (Chris)
- Fix gt reset with GuC submission is disabled (Nirmoy)
- Correct capture of EIR register on hang (John)

- Remove usage of the deprecated ida_simple_xx() API
- Refactor confusing __intel_gt_reset() (Nirmoy)
- Fix the fix for GuC reset lock confusion (John)
- Simplify/extend platform check for Wa_14018913170 (John)
- Replace dev_priv with i915 (Andi)
- Add and use gt_to_guc() wrapper (Andi)
- Remove bogus null check (Rodrigo, Dan)

. Selftest improvements (Janusz, Nirmoy, Daniele)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZitVBTvZmityDi7D@jlahtine-mobl.ger.corp.intel.com
parents b84bc948 4d3421e0

drivers/gpu/drm/i915/gem/i915_gem_context.c

+14 −2
Original line number Diff line number Diff line
@@ -879,6 +879,7 @@ static int set_proto_ctx_param(struct drm_i915_file_private *fpriv, 
			       struct i915_gem_proto_context *pc,

			       struct drm_i915_gem_context_param *args)

{

	struct drm_i915_private *i915 = fpriv->i915;

	int ret = 0;



	switch (args->param) {
@@ -904,6 +905,13 @@ static int set_proto_ctx_param(struct drm_i915_file_private *fpriv, 
			pc->user_flags &= ~BIT(UCONTEXT_BANNABLE);

		break;



	case I915_CONTEXT_PARAM_LOW_LATENCY:

		if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))

			pc->user_flags |= BIT(UCONTEXT_LOW_LATENCY);

		else

			ret = -EINVAL;

		break;



	case I915_CONTEXT_PARAM_RECOVERABLE:

		if (args->size)

			ret = -EINVAL;
@@ -992,6 +1000,9 @@ static int intel_context_set_gem(struct intel_context *ce, 
	if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS))

		ret = intel_context_reconfigure_sseu(ce, sseu);



	if (test_bit(UCONTEXT_LOW_LATENCY, &ctx->user_flags))

		__set_bit(CONTEXT_LOW_LATENCY, &ce->flags);



	return ret;

}
@@ -1630,6 +1641,9 @@ i915_gem_create_context(struct drm_i915_private *i915, 
	if (vm)

		ctx->vm = vm;



	/* Assign early so intel_context_set_gem can access these flags */

	ctx->user_flags = pc->user_flags;



	mutex_init(&ctx->engines_mutex);

	if (pc->num_user_engines >= 0) {

		i915_gem_context_set_user_engines(ctx);
@@ -1652,8 +1666,6 @@ i915_gem_create_context(struct drm_i915_private *i915, 
	 * is no remap info, it will be a NOP. */

	ctx->remap_slice = ALL_L3_SLICES(i915);



	ctx->user_flags = pc->user_flags;



	for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)

		ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;

drivers/gpu/drm/i915/gem/i915_gem_context_types.h

+1 −0
Original line number Diff line number Diff line
@@ -338,6 +338,7 @@ struct i915_gem_context { 
#define UCONTEXT_BANNABLE		2

#define UCONTEXT_RECOVERABLE		3

#define UCONTEXT_PERSISTENCE		4

#define UCONTEXT_LOW_LATENCY		5



	/**

	 * @flags: small set of booleans

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

+2 −20
Original line number Diff line number Diff line
@@ -255,7 +255,6 @@ struct i915_execbuffer { 
	struct intel_context *context; /* logical state for the request */

	struct i915_gem_context *gem_context; /** caller's context */

	intel_wakeref_t wakeref;

	intel_wakeref_t wakeref_gt0;



	/** our requests to build */

	struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
@@ -2457,7 +2456,7 @@ static int eb_submit(struct i915_execbuffer *eb) 
 * The engine index is returned.

 */

static unsigned int

gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,

gen8_dispatch_bsd_engine(struct drm_i915_private *i915,

			 struct drm_file *file)

{

	struct drm_i915_file_private *file_priv = file->driver_priv;
@@ -2465,7 +2464,7 @@ gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, 
	/* Check whether the file_priv has already selected one ring. */

	if ((int)file_priv->bsd_engine < 0)

		file_priv->bsd_engine =

			get_random_u32_below(dev_priv->engine_uabi_class_count[I915_ENGINE_CLASS_VIDEO]);

			get_random_u32_below(i915->engine_uabi_class_count[I915_ENGINE_CLASS_VIDEO]);



	return file_priv->bsd_engine;

}
@@ -2686,7 +2685,6 @@ static int 
eb_select_engine(struct i915_execbuffer *eb)

{

	struct intel_context *ce, *child;

	struct intel_gt *gt;

	unsigned int idx;

	int err;
@@ -2710,17 +2708,10 @@ eb_select_engine(struct i915_execbuffer *eb) 
		}

	}

	eb->num_batches = ce->parallel.number_children + 1;

	gt = ce->engine->gt;



	for_each_child(ce, child)

		intel_context_get(child);

	eb->wakeref = intel_gt_pm_get(ce->engine->gt);

	/*

	 * Keep GT0 active on MTL so that i915_vma_parked() doesn't

	 * free VMAs while execbuf ioctl is validating VMAs.

	 */

	if (gt->info.id)

		eb->wakeref_gt0 = intel_gt_pm_get(to_gt(gt->i915));



	if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {

		err = intel_context_alloc_state(ce);
@@ -2759,9 +2750,6 @@ eb_select_engine(struct i915_execbuffer *eb) 
	return err;



err:

	if (gt->info.id)

		intel_gt_pm_put(to_gt(gt->i915), eb->wakeref_gt0);



	intel_gt_pm_put(ce->engine->gt, eb->wakeref);

	for_each_child(ce, child)

		intel_context_put(child);
@@ -2775,12 +2763,6 @@ eb_put_engine(struct i915_execbuffer *eb) 
	struct intel_context *child;



	i915_vm_put(eb->context->vm);

	/*

	 * This works in conjunction with eb_select_engine() to prevent

	 * i915_vma_parked() from interfering while execbuf validates vmas.

	 */

	if (eb->gt->info.id)

		intel_gt_pm_put(to_gt(eb->gt->i915), eb->wakeref_gt0);

	intel_gt_pm_put(eb->context->engine->gt, eb->wakeref);

	for_each_child(eb->context, child)

		intel_context_put(child);

drivers/gpu/drm/i915/gem/i915_gem_shmem.c

+3 −3
Original line number Diff line number Diff line
@@ -654,7 +654,7 @@ i915_gem_object_create_shmem(struct drm_i915_private *i915, 


/* Allocate a new GEM object and fill it with the supplied data */

struct drm_i915_gem_object *

i915_gem_object_create_shmem_from_data(struct drm_i915_private *dev_priv,

i915_gem_object_create_shmem_from_data(struct drm_i915_private *i915,

				       const void *data, resource_size_t size)

{

	struct drm_i915_gem_object *obj;
@@ -663,8 +663,8 @@ i915_gem_object_create_shmem_from_data(struct drm_i915_private *dev_priv, 
	resource_size_t offset;

	int err;



	GEM_WARN_ON(IS_DGFX(dev_priv));

	obj = i915_gem_object_create_shmem(dev_priv, round_up(size, PAGE_SIZE));

	GEM_WARN_ON(IS_DGFX(i915));

	obj = i915_gem_object_create_shmem(i915, round_up(size, PAGE_SIZE));

	if (IS_ERR(obj))

		return obj;

drivers/gpu/drm/i915/gem/i915_gem_stolen.h

+4 −4
Original line number Diff line number Diff line
@@ -14,14 +14,14 @@ struct drm_i915_gem_object; 


#define i915_stolen_fb drm_mm_node



int i915_gem_stolen_insert_node(struct drm_i915_private *dev_priv,

int i915_gem_stolen_insert_node(struct drm_i915_private *i915,

				struct drm_mm_node *node, u64 size,

				unsigned alignment);

int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *dev_priv,

int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *i915,

					 struct drm_mm_node *node, u64 size,

					 unsigned alignment, u64 start,

					 u64 end);

void i915_gem_stolen_remove_node(struct drm_i915_private *dev_priv,

void i915_gem_stolen_remove_node(struct drm_i915_private *i915,

				 struct drm_mm_node *node);

struct intel_memory_region *

i915_gem_stolen_smem_setup(struct drm_i915_private *i915, u16 type,
@@ -31,7 +31,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type, 
			   u16 instance);



struct drm_i915_gem_object *

i915_gem_object_create_stolen(struct drm_i915_private *dev_priv,

i915_gem_object_create_stolen(struct drm_i915_private *i915,

			      resource_size_t size);



bool i915_gem_object_is_stolen(const struct drm_i915_gem_object *obj);