Commit 68d5d973 authored by Dave Jiang's avatar Dave Jiang
Browse files

cxl/test: Refactor decoder setup to reduce cxl_test burden 



Group the decoder setup code in switch and endpoint port probe into a
single function for each to reduce the number of functions to be mocked
in cxl_test. Introduce devm_cxl_switch_port_decoders_setup() and
devm_cxl_endpoint_decoders_setup(). These two functions will be mocked
instead with some functions optimized out since the mock version does
not do anything. Remove devm_cxl_setup_hdm(),
devm_cxl_add_passthrough_decoder(), and devm_cxl_enumerate_decoders() in
cxl_test mock code. In turn, mock_cxl_add_passthrough_decoder() can be
removed since cxl_test does not setup passthrough decoders.
__wrap_cxl_hdm_decode_init() and __wrap_cxl_dvsec_rr_decode() can be
removed as well since they only return 0 when called.

[dj: drop 'struct cxl_port' forward declaration (Robert)]

Suggested-by: default avatarRobert Richter <rrichter@amd.com>
Reviewed-by: default avatarAlison Schofield <alison.schofield@intel.com>
Reviewed-by: default avatarJonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: default avatarRobert Richter <rrichter@amd.com>
Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
parent 02edab6c

drivers/cxl/core/core.h

+5 −0
Original line number Diff line number Diff line
@@ -147,6 +147,11 @@ int cxl_ras_init(void); 
void cxl_ras_exit(void);

int cxl_gpf_port_setup(struct cxl_dport *dport);



struct cxl_hdm;

int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,

			struct cxl_endpoint_dvsec_info *info);

int cxl_port_get_possible_dports(struct cxl_port *port);



#ifdef CONFIG_CXL_FEATURES

struct cxl_feat_entry *

cxl_feature_info(struct cxl_features_state *cxlfs, const uuid_t *uuid);

drivers/cxl/core/hdm.c

+73 −8
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld) 
 * are claimed and passed to the single dport. Disable the range until the first

 * CXL region is enumerated / activated.

 */

int devm_cxl_add_passthrough_decoder(struct cxl_port *port)

static int devm_cxl_add_passthrough_decoder(struct cxl_port *port)

{

	struct cxl_switch_decoder *cxlsd;

	struct cxl_dport *dport = NULL;
@@ -75,7 +75,6 @@ int devm_cxl_add_passthrough_decoder(struct cxl_port *port) 


	return add_hdm_decoder(port, &cxlsd->cxld);

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_add_passthrough_decoder, "CXL");



static void parse_hdm_decoder_caps(struct cxl_hdm *cxlhdm)

{
@@ -145,7 +144,7 @@ static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) 
 * @port: cxl_port to map

 * @info: cached DVSEC range register info

 */

struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,

static struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,

					  struct cxl_endpoint_dvsec_info *info)

{

	struct cxl_register_map *reg_map = &port->reg_map;
@@ -201,7 +200,6 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port, 


	return cxlhdm;

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_hdm, "CXL");



static void __cxl_dpa_debug(struct seq_file *file, struct resource *r, int depth)

{
@@ -1166,7 +1164,7 @@ static void cxl_settle_decoders(struct cxl_hdm *cxlhdm) 
 * @cxlhdm: Structure to populate with HDM capabilities

 * @info: cached DVSEC range register info

 */

int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,

static int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,

				       struct cxl_endpoint_dvsec_info *info)

{

	void __iomem *hdm = cxlhdm->regs.hdm_decoder;
@@ -1222,4 +1220,71 @@ int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm, 


	return 0;

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_enumerate_decoders, "CXL");
 


/**

 * devm_cxl_switch_port_decoders_setup - allocate and setup switch decoders

 * @port: CXL port context

 *

 * Return 0 or -errno on error

 */

int devm_cxl_switch_port_decoders_setup(struct cxl_port *port)

{

	struct cxl_hdm *cxlhdm;



	if (is_cxl_root(port) || is_cxl_endpoint(port))

		return -EOPNOTSUPP;



	cxlhdm = devm_cxl_setup_hdm(port, NULL);

	if (!IS_ERR(cxlhdm))

		return devm_cxl_enumerate_decoders(cxlhdm, NULL);



	if (PTR_ERR(cxlhdm) != -ENODEV) {

		dev_err(&port->dev, "Failed to map HDM decoder capability\n");

		return PTR_ERR(cxlhdm);

	}



	if (cxl_port_get_possible_dports(port) == 1) {

		dev_dbg(&port->dev, "Fallback to passthrough decoder\n");

		return devm_cxl_add_passthrough_decoder(port);

	}



	dev_err(&port->dev, "HDM decoder capability not found\n");

	return -ENXIO;

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_switch_port_decoders_setup, "CXL");



/**

 * devm_cxl_endpoint_decoders_setup - allocate and setup endpoint decoders

 * @port: CXL port context

 *

 * Return 0 or -errno on error

 */

int devm_cxl_endpoint_decoders_setup(struct cxl_port *port)

{

	struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);

	struct cxl_endpoint_dvsec_info info = { .port = port };

	struct cxl_dev_state *cxlds = cxlmd->cxlds;

	struct cxl_hdm *cxlhdm;

	int rc;



	if (!is_cxl_endpoint(port))

		return -EOPNOTSUPP;



	rc = cxl_dvsec_rr_decode(cxlds, &info);

	if (rc < 0)

		return rc;



	cxlhdm = devm_cxl_setup_hdm(port, &info);

	if (IS_ERR(cxlhdm)) {

		if (PTR_ERR(cxlhdm) == -ENODEV)

			dev_err(&port->dev, "HDM decoder registers not found\n");

		return PTR_ERR(cxlhdm);

	}



	rc = cxl_hdm_decode_init(cxlds, cxlhdm, &info);

	if (rc)

		return rc;



	return devm_cxl_enumerate_decoders(cxlhdm, &info);

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_endpoint_decoders_setup, "CXL");

drivers/cxl/core/pci.c

+42 −0
Original line number Diff line number Diff line
@@ -1169,3 +1169,45 @@ int cxl_gpf_port_setup(struct cxl_dport *dport) 


	return 0;

}



static int count_dports(struct pci_dev *pdev, void *data)

{

	struct cxl_walk_context *ctx = data;

	int type = pci_pcie_type(pdev);



	if (pdev->bus != ctx->bus)

		return 0;

	if (!pci_is_pcie(pdev))

		return 0;

	if (type != ctx->type)

		return 0;



	ctx->count++;

	return 0;

}



int cxl_port_get_possible_dports(struct cxl_port *port)

{

	struct pci_bus *bus = cxl_port_to_pci_bus(port);

	struct cxl_walk_context ctx;

	int type;



	if (!bus) {

		dev_err(&port->dev, "No PCI bus found for port %s\n",

			dev_name(&port->dev));

		return -ENXIO;

	}



	if (pci_is_root_bus(bus))

		type = PCI_EXP_TYPE_ROOT_PORT;

	else

		type = PCI_EXP_TYPE_DOWNSTREAM;



	ctx = (struct cxl_walk_context) {

		.bus = bus,

		.type = type,

	};

	pci_walk_bus(bus, count_dports, &ctx);



	return ctx.count;

}

drivers/cxl/cxl.h

+3 −6
Original line number Diff line number Diff line
@@ -810,12 +810,9 @@ struct cxl_endpoint_dvsec_info { 
	struct range dvsec_range[2];

};



struct cxl_hdm;

struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,

				   struct cxl_endpoint_dvsec_info *info);

int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,

				struct cxl_endpoint_dvsec_info *info);

int devm_cxl_add_passthrough_decoder(struct cxl_port *port);

int devm_cxl_switch_port_decoders_setup(struct cxl_port *port);

int devm_cxl_endpoint_decoders_setup(struct cxl_port *port);



struct cxl_dev_state;

int cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds,

			struct cxl_endpoint_dvsec_info *info);

drivers/cxl/cxlpci.h

+0 −2
Original line number Diff line number Diff line
@@ -129,8 +129,6 @@ static inline bool cxl_pci_flit_256(struct pci_dev *pdev) 


int devm_cxl_port_enumerate_dports(struct cxl_port *port);

struct cxl_dev_state;

int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm,

			struct cxl_endpoint_dvsec_info *info);

void read_cdat_data(struct cxl_port *port);

void cxl_cor_error_detected(struct pci_dev *pdev);

pci_ers_result_t cxl_error_detected(struct pci_dev *pdev,