Commit 690b5e39 authored by Roman Li's avatar Roman Li Committed by Alex Deucher
Browse files

drm/amd/display: Initial prototype of FBC implementation 



- Protected by ENABLE_FBC compile flag

Signed-off-by: default avatarRoman Li <Roman.Li@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a32e24b4

drivers/gpu/drm/amd/display/dc/core/dc.c

+5 −2
Original line number Diff line number Diff line
@@ -475,7 +475,9 @@ static bool construct(struct core_dc *dc, 


	dc_version = resource_parse_asic_id(init_params->asic_id);

	dc->ctx->dce_version = dc_version;



#ifdef ENABLE_FBC

	dc->ctx->fbc_gpu_addr = init_params->fbc_gpu_addr;

#endif

	/* Resource should construct all asic specific resources.

	 * This should be the only place where we need to parse the asic id

	 */
@@ -919,7 +921,7 @@ bool dc_enable_stereo( 
#ifdef ENABLE_FBC

	if (fbc_compressor != NULL &&

	    fbc_compressor->funcs->is_fbc_enabled_in_hw(core_dc->fbc_compressor,

							&pipe->tg->inst))

							NULL))

		fbc_compressor->funcs->disable_fbc(fbc_compressor);



#endif
@@ -2066,3 +2068,4 @@ void dc_log_hw_state(struct dc *dc) 
	if (core_dc->hwss.log_hw_state)

		core_dc->hwss.log_hw_state(core_dc);

}

drivers/gpu/drm/amd/display/dc/dc.h

+3 −0
Original line number Diff line number Diff line
@@ -231,6 +231,9 @@ struct dc_init_data { 
	enum dce_environment dce_environment;



	struct dc_config flags;

#ifdef ENABLE_FBC

	uint64_t fbc_gpu_addr;

#endif

};



struct dc *dc_create(const struct dc_init_data *init_params);

drivers/gpu/drm/amd/display/dc/dc_types.h

+3 −0
Original line number Diff line number Diff line
@@ -92,6 +92,9 @@ struct dc_context { 
	bool created_bios;

	struct gpio_service *gpio_service;

	struct i2caux *i2caux;

#ifdef ENABLE_FBC

	uint64_t fbc_gpu_addr;

#endif

};

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+69 −0
Original line number Diff line number Diff line
@@ -1528,6 +1528,69 @@ static void apply_min_clocks( 
	}

}



#ifdef ENABLE_FBC



/*

 *  Check if FBC can be enabled

 */

static enum dc_status validate_fbc(struct core_dc *dc,

		struct validate_context *context)

{

	struct pipe_ctx *pipe_ctx =

			      &context->res_ctx.pipe_ctx[0];



	ASSERT(dc->fbc_compressor);



	/* FBC memory should be allocated */

	if (!dc->ctx->fbc_gpu_addr)

		return DC_ERROR_UNEXPECTED;



	/* Only supports single display */

	if (context->stream_count != 1)

		return DC_ERROR_UNEXPECTED;



	/* Only supports eDP */

	if (pipe_ctx->stream->sink->link->connector_signal != SIGNAL_TYPE_EDP)

		return DC_ERROR_UNEXPECTED;



	/* PSR should not be enabled */

	if (pipe_ctx->stream->sink->link->psr_enabled)

		return DC_ERROR_UNEXPECTED;



	return DC_OK;

}



/*

 *  Enable FBC

 */

static enum dc_status enable_fbc(struct core_dc *dc,

		struct validate_context *context)

{

	enum dc_status status = validate_fbc(dc, context);



	if (status == DC_OK) {

		/* Program GRPH COMPRESSED ADDRESS and PITCH */

		struct compr_addr_and_pitch_params params = {0, 0, 0};

		struct compressor *compr = dc->fbc_compressor;

		struct pipe_ctx *pipe_ctx =

				      &context->res_ctx.pipe_ctx[0];



		params.source_view_width =

				pipe_ctx->stream->timing.h_addressable;

		params.source_view_height =

				pipe_ctx->stream->timing.v_addressable;



		compr->compr_surface_address.quad_part = dc->ctx->fbc_gpu_addr;



		compr->funcs->surface_address_and_pitch(compr, &params);

		compr->funcs->set_fbc_invalidation_triggers(compr, 1);



		compr->funcs->enable_fbc(compr, &params);

	}

	return status;

}

#endif



static enum dc_status apply_ctx_to_hw_fpga(

		struct core_dc *dc,

		struct validate_context *context)
@@ -1836,6 +1899,11 @@ enum dc_status dce110_apply_ctx_to_hw( 


	switch_dp_clock_sources(dc, &context->res_ctx);



#ifdef ENABLE_FBC

	if (dc->fbc_compressor)

		enable_fbc(dc, context);



#endif



	return DC_OK;

}
@@ -2244,6 +2312,7 @@ static void init_hw(struct core_dc *dc) 
	if (dc->fbc_compressor)

		dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor);

#endif



}



void dce110_fill_display_configs(

drivers/gpu/drm/amd/display/dc/inc/compressor.h

+1 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ union fbc_physical_address { 
		uint32_t low_part;

		int32_t high_part;

	} addr;

	uint64_t quad_part;

};



struct compr_addr_and_pitch_params {