Commit 694b2ef1 authored by Sunil V L's avatar Sunil V L Committed by Paul Walmsley
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ACPI: RISC-V: Create interrupt controller list in sorted order 



Currently, the interrupt controller list is created without any order.
Create the list sorted with the GSI base of the interrupt controllers.

Signed-off-by: default avatarSunil V L <sunilvl@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Acked-by: default avatarJassi Brar <jassisinghbrar@gmail.com>
Link: https://lore.kernel.org/r/20250818040920.272664-18-apatel@ventanamicro.com


Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent 4215d1cf

drivers/acpi/riscv/irq.c

+7 −2
Original line number Diff line number Diff line
@@ -115,7 +115,7 @@ struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi) 
static int __init riscv_acpi_register_ext_intc(u32 gsi_base, u32 nr_irqs, u32 nr_idcs,

					       u32 id, u32 type)

{

	struct riscv_ext_intc_list *ext_intc_element;

	struct riscv_ext_intc_list *ext_intc_element, *node;



	ext_intc_element = kzalloc(sizeof(*ext_intc_element), GFP_KERNEL);

	if (!ext_intc_element)
@@ -125,7 +125,12 @@ static int __init riscv_acpi_register_ext_intc(u32 gsi_base, u32 nr_irqs, u32 nr 
	ext_intc_element->nr_irqs = nr_irqs;

	ext_intc_element->nr_idcs = nr_idcs;

	ext_intc_element->id = id;

	list_add_tail(&ext_intc_element->list, &ext_intc_list);

	list_for_each_entry(node, &ext_intc_list, list) {

		if (node->gsi_base < ext_intc_element->gsi_base)

			break;

	}



	list_add_tail(&ext_intc_element->list, &node->list);

	return 0;

}