Commit 69f22c5b authored by Hansen Dsouza's avatar Hansen Dsouza Committed by Alex Deucher
Browse files

drm/amd/display: Add a boot option to reduce phy ssc for HBR3 



[Why]
Spread on DPREFCLK by 0.3 percent can have a negative effect on sink
when PHY SSC is also spread by 0.3 percent
[How]
Add boot option for DMU to lower PHY SSC

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarHansen Dsouza <Hansen.Dsouza@amd.com>
Signed-off-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7a65e88f

drivers/gpu/drm/amd/display/dmub/dmub_srv.h

+1 −0
Original line number Diff line number Diff line
@@ -301,6 +301,7 @@ struct dmub_srv_hw_params { 
	bool disallow_phy_access;

	bool disable_sldo_opt;

	bool enable_non_transparent_setconfig;

	bool lower_hbr3_phy_ssc;

};



/**

drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h

+2 −1
Original line number Diff line number Diff line
@@ -694,7 +694,8 @@ union dmub_fw_boot_options { 
		uint32_t ips_disable: 3; /* options to disable ips support*/

		uint32_t ips_sequential_ono: 1; /**< 1 to enable sequential ONO IPS sequence */

		uint32_t disable_sldo_opt: 1; /**< 1 to disable SLDO optimizations */

		uint32_t reserved : 7; /**< reserved */

		uint32_t lower_hbr3_phy_ssc: 1; /**< 1 to lower hbr3 phy ssc to 0.125 percent */

		uint32_t reserved : 6; /**< reserved */

	} bits; /**< boot bits */

	uint32_t all; /**< 32-bit access to bits */

};

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

+1 −0
Original line number Diff line number Diff line
@@ -426,6 +426,7 @@ void dmub_dcn35_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmu 
	boot_options.bits.ips_sequential_ono = params->ips_sequential_ono;

	boot_options.bits.disable_sldo_opt = params->disable_sldo_opt;

	boot_options.bits.enable_non_transparent_setconfig = params->enable_non_transparent_setconfig;

	boot_options.bits.lower_hbr3_phy_ssc = params->lower_hbr3_phy_ssc;



	REG_WRITE(DMCUB_SCRATCH14, boot_options.all);

}