Commit 6a103867 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus-iommufd' of git://git.kernel.org/pub/scm/linux/kernel/git/jgg/iommufd 

Pull iommufd fixes from Jason Gunthorpe:
 "One bug fix and some documentation updates:

   - Correct typos in comments

   - Elaborate a comment about how the uAPI works for
     IOMMU_HW_INFO_TYPE_ARM_SMMUV3

   - Fix a double free on error path and add test coverage for the bug"

* tag 'for-linus-iommufd' of git://git.kernel.org/pub/scm/linux/kernel/git/jgg/iommufd:
  iommu/arm-smmu-v3: Improve uAPI comment for IOMMU_HW_INFO_TYPE_ARM_SMMUV3
  iommufd/selftest: Cover IOMMU_FAULT_QUEUE_ALLOC in iommufd_fail_nth
  iommufd: Fix out_fput in iommufd_fault_alloc()
  iommufd: Fix typos in kernel-doc comments
parents f65289a8 2ca704f5

drivers/iommu/iommufd/fault.c

+0 −2
Original line number Diff line number Diff line
@@ -420,8 +420,6 @@ int iommufd_fault_alloc(struct iommufd_ucmd *ucmd) 
	put_unused_fd(fdno);

out_fput:

	fput(filep);

	refcount_dec(&fault->obj.users);

	iommufd_ctx_put(fault->ictx);

out_abort:

	iommufd_object_abort_and_destroy(ucmd->ictx, &fault->obj);

include/uapi/linux/iommufd.h

+20 −11
Original line number Diff line number Diff line
@@ -297,7 +297,7 @@ struct iommu_ioas_unmap { 
 *                       ioctl(IOMMU_OPTION_HUGE_PAGES)

 * @IOMMU_OPTION_RLIMIT_MODE:

 *    Change how RLIMIT_MEMLOCK accounting works. The caller must have privilege

 *    to invoke this. Value 0 (default) is user based accouting, 1 uses process

 *    to invoke this. Value 0 (default) is user based accounting, 1 uses process

 *    based accounting. Global option, object_id must be 0

 * @IOMMU_OPTION_HUGE_PAGES:

 *    Value 1 (default) allows contiguous pages to be combined when generating
@@ -390,7 +390,7 @@ struct iommu_vfio_ioas { 
 * @IOMMU_HWPT_ALLOC_PASID: Requests a domain that can be used with PASID. The

 *                          domain can be attached to any PASID on the device.

 *                          Any domain attached to the non-PASID part of the

 *                          device must also be flaged, otherwise attaching a

 *                          device must also be flagged, otherwise attaching a

 *                          PASID will blocked.

 *                          If IOMMU does not support PASID it will return

 *                          error (-EOPNOTSUPP).
@@ -558,16 +558,25 @@ struct iommu_hw_info_vtd { 
 * For the details of @idr, @iidr and @aidr, please refer to the chapters

 * from 6.3.1 to 6.3.6 in the SMMUv3 Spec.

 *

 * User space should read the underlying ARM SMMUv3 hardware information for

 * the list of supported features.

 * This reports the raw HW capability, and not all bits are meaningful to be

 * read by userspace. Only the following fields should be used:

 *

 * Note that these values reflect the raw HW capability, without any insight if

 * any required kernel driver support is present. Bits may be set indicating the

 * HW has functionality that is lacking kernel software support, such as BTM. If

 * a VMM is using this information to construct emulated copies of these

 * registers it should only forward bits that it knows it can support.

 * idr[0]: ST_LEVEL, TERM_MODEL, STALL_MODEL, TTENDIAN , CD2L, ASID16, TTF

 * idr[1]: SIDSIZE, SSIDSIZE

 * idr[3]: BBML, RIL

 * idr[5]: VAX, GRAN64K, GRAN16K, GRAN4K

 *

 * In future, presence of required kernel support will be indicated in flags.

 * - S1P should be assumed to be true if a NESTED HWPT can be created

 * - VFIO/iommufd only support platforms with COHACC, it should be assumed to be

 *   true.

 * - ATS is a per-device property. If the VMM describes any devices as ATS

 *   capable in ACPI/DT it should set the corresponding idr.

 *

 * This list may expand in future (eg E0PD, AIE, PBHA, D128, DS etc). It is

 * important that VMMs do not read bits outside the list to allow for

 * compatibility with future kernels. Several features in the SMMUv3

 * architecture are not currently supported by the kernel for nesting: HTTU,

 * BTM, MPAM and others.

 */

struct iommu_hw_info_arm_smmuv3 {

	__u32 flags;
@@ -766,7 +775,7 @@ struct iommu_hwpt_vtd_s1_invalidate { 
};



/**

 * struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cahce invalidation

 * struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cache invalidation

 *         (IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3)

 * @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ.

 *       Must be little-endian.

tools/testing/selftests/iommu/iommufd_fail_nth.c

+14 −0
Original line number Diff line number Diff line
@@ -615,7 +615,12 @@ TEST_FAIL_NTH(basic_fail_nth, access_pin_domain) 
/* device.c */

TEST_FAIL_NTH(basic_fail_nth, device)

{

	struct iommu_hwpt_selftest data = {

		.iotlb = IOMMU_TEST_IOTLB_DEFAULT,

	};

	struct iommu_test_hw_info info;

	uint32_t fault_id, fault_fd;

	uint32_t fault_hwpt_id;

	uint32_t ioas_id;

	uint32_t ioas_id2;

	uint32_t stdev_id;
@@ -678,6 +683,15 @@ TEST_FAIL_NTH(basic_fail_nth, device) 
	if (_test_cmd_vdevice_alloc(self->fd, viommu_id, idev_id, 0, &vdev_id))

		return -1;



	if (_test_ioctl_fault_alloc(self->fd, &fault_id, &fault_fd))

		return -1;

	close(fault_fd);



	if (_test_cmd_hwpt_alloc(self->fd, idev_id, hwpt_id, fault_id,

				 IOMMU_HWPT_FAULT_ID_VALID, &fault_hwpt_id,

				 IOMMU_HWPT_DATA_SELFTEST, &data, sizeof(data)))

		return -1;



	return 0;

}