Commit 6a6d8b6f authored by Dave Thaler's avatar Dave Thaler Committed by Alexei Starovoitov
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parent 4e1215d9
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+102 −82
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ Types
This document refers to integer types with the notation `SN` to specify
a type's signedness (`S`) and bit width (`N`), respectively.

.. table:: Meaning of signedness notation.
.. table:: Meaning of signedness notation

  ==== =========
  S    Meaning
@@ -41,7 +41,7 @@ a type's signedness (`S`) and bit width (`N`), respectively.
  s    signed
  ==== =========

.. table:: Meaning of bit-width notation.
.. table:: Meaning of bit-width notation

  ===== =========
  N     Bit width
@@ -263,6 +263,8 @@ Instruction classes

The three least significant bits of the 'opcode' field store the instruction class:

.. table:: Instruction class

  =====  =====  ===============================  ===================================
  class  value  description                      reference
  =====  =====  ===============================  ===================================
@@ -292,6 +294,8 @@ For arithmetic and jump instructions (``ALU``, ``ALU64``, ``JMP`` and
**s (source)**
  the source operand location, which unless otherwise specified is one of:

  .. table:: Source operand location

  ======  =====  ==============================================
  source  value  description
  ======  =====  ==============================================
@@ -312,6 +316,8 @@ The 'code' field encodes the operation as below, where 'src' refers to the
the source operand and 'dst' refers to the value of the destination
register.

.. table:: Arithmetic instructions

  =====  =====  =======  ==========================================================
  name   code   offset   description
  =====  =====  =======  ==========================================================
@@ -426,6 +432,8 @@ select what byte order the operation converts from or to. For
``ALU64``, the 1-bit source operand field in the opcode is reserved
and MUST be set to 0.

.. table:: Byte swap instructions

  =====  ========  =====  =================================================
  class  source    value  description
  =====  ========  =====  =================================================
@@ -468,6 +476,8 @@ otherwise identical operations, and indicates the base64 conformance
group unless otherwise specified.
The 'code' field encodes the operation as below:

.. table:: Jump instructions

  ========  =====  =======  =================================  ===================================================
  code      value  src_reg  description                        notes
  ========  =====  =======  =================================  ===================================================
@@ -559,6 +569,8 @@ For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the
**mode**
  The mode modifier is one of:

  .. table:: Mode modifier

    =============  =====  ====================================  =============
    mode modifier  value  description                           reference
    =============  =====  ====================================  =============
@@ -573,6 +585,8 @@ For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the
**sz (size)**
  The size modifier is one of:

  .. table:: Size modifier

    ====  =====  =====================
    size  value  description
    ====  =====  =====================
@@ -641,6 +655,8 @@ The 'imm' field is used to encode the actual atomic operation.
Simple atomic operation use a subset of the values defined to encode
arithmetic operations in the 'imm' field to encode the atomic operation:

.. table:: Simple atomic operations

  ========  =====  ===========
  imm       value  description
  ========  =====  ===========
@@ -662,6 +678,8 @@ XOR 0xa0 atomic xor
In addition to the simple atomic operations, there also is a modifier and
two complex atomic operations:

.. table:: Complex atomic operations

===========  ================  ===========================
imm          value             description
===========  ================  ===========================
@@ -695,6 +713,8 @@ The following table defines a set of ``{IMM, DW, LD}`` instructions
with opcode subtypes in the 'src_reg' field, using new terms such as "map"
defined further below:

.. table:: 64-bit immediate instructions

  =======  =========================================  ===========  ==============
  src_reg  pseudocode                                 imm type     dst type
  =======  =========================================  ===========  ==============