Commit 6a74422b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips_6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS updates from Thomas Bogendoerfer:

 - switch longson32 platform to DT and use MIPS_GENERIC framework

 - cleanups/fixes for lantiq DTs

 - other cleanups and fixes

* tag 'mips_6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
  mips: math-emu: replace deprecated strcpy() in me-debugfs
  MIPS: configs: Consolidate Loongson1 defconfigs
  MIPS: Unify Loongson1 PRID_REV
  MIPS: loongson32: Switch to generic core
  MIPS: loongson: Add built-in DTB support
  MIPS: dts: loongson: Add CQ-T300B board
  MIPS: dts: loongson: Add Smartloong-1C board
  MIPS: dts: loongson: Add LSGZ_1B_DEV board
  MIPS: dts: loongson: Add LS1B-DEMO board
  dt-bindings: mips: loongson: Add LS1B-DEMO and CQ-T300B
  mips: lantiq: danube: rename stp node on EASY50712 reference board
  mips: lantiq: xway: sysctrl: rename stp clock
  MIPS: RB532: Replace deprecated strcpy() with memcpy() and strscpy()
  MIPS: Loongson64: Replace deprecated strcpy() with strscpy_pad()
  MIPS: generic: Replace deprecated strcpy() in ocelot_detect()
  MIPS: octeon: Replace deprecated strcpy() in octeon_model_get_string_buffer()
  MIPS: octeon: Replace memset(0) + deprecated strcpy() with strscpy_pad()
  MIPS: arc: Replace deprecated strcpy() with memcpy()
  MIPS: txx9: Replace deprecated strcpy() with strscpy()
  MIPS: sni: Replace deprecated strcpy() in sni_console_setup()
  ...
parents 742adaa1 c662a6fe

Documentation/devicetree/bindings/mips/cpus.yaml

+1 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ properties: 
      - mips,mips1004Kc

      - mips,mips24KEc

      - mips,mips24Kc

      - mips,mips34Kc

      - mips,mips4KEc

      - mips,mips4Kc

      - mips,mips74Kc

Documentation/devicetree/bindings/mips/loongson/devices.yaml

+2 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ properties: 
      - description: LS1B based boards

        items:

          - enum:

              - loongson,ls1b-demo

              - loongson,lsgz-1b-dev

          - const: loongson,ls1b
@@ -47,6 +48,7 @@ properties: 
        items:

          - enum:

              - loongmasses,smartloong-1c

              - loongson,cq-t300b

          - const: loongson,ls1c



additionalProperties: true

MAINTAINERS

+2 −1
Original line number Diff line number Diff line
@@ -17267,7 +17267,8 @@ M: Keguang Zhang <keguang.zhang@gmail.com> 
L:	linux-mips@vger.kernel.org

S:	Maintained

F:	Documentation/devicetree/bindings/*/loongson,ls1*.yaml

F:	arch/mips/include/asm/mach-loongson32/

F:	arch/mips/boot/dts/loongson/loongson1*

F:	arch/mips/configs/loongson1_defconfig

F:	arch/mips/loongson32/

F:	drivers/*/*loongson1*

F:	drivers/mtd/nand/raw/loongson-nand-controller.c

arch/mips/Kconfig

+32 −32
Original line number Diff line number Diff line
@@ -479,6 +479,23 @@ config LANTIQ 


config MACH_LOONGSON32

	bool "Loongson 32-bit family of machines"

	select MACH_GENERIC_CORE

	select USE_OF

	select BUILTIN_DTB

	select BOOT_ELF32

	select CEVT_R4K

	select CSRC_R4K

	select COMMON_CLK

	select DMA_NONCOHERENT

	select GENERIC_IRQ_SHOW_LEVEL

	select IRQ_MIPS_CPU

	select LS1X_IRQ

	select SYS_HAS_CPU_LOONGSON32

	select SYS_HAS_EARLY_PRINTK

	select USE_GENERIC_EARLY_PRINTK_8250

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_HIGHMEM

	select SYS_SUPPORTS_ZBOOT

	help

	  This enables support for the Loongson-1 family of machines.
@@ -1385,25 +1402,20 @@ config CPU_LOONGSON2F 
	  have a similar programming interface with FPGA northbridge used in

	  Loongson2E.



config CPU_LOONGSON1B

	bool "Loongson 1B"

	depends on SYS_HAS_CPU_LOONGSON1B

	select CPU_LOONGSON32

	select LEDS_GPIO_REGISTER

	help

	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32

	  Release 1 instruction set and part of the MIPS32 Release 2

	  instruction set.



config CPU_LOONGSON1C

	bool "Loongson 1C"

	depends on SYS_HAS_CPU_LOONGSON1C

	select CPU_LOONGSON32

config CPU_LOONGSON32

	bool "Loongson 32-bit CPU"

	depends on SYS_HAS_CPU_LOONGSON32

	select CPU_MIPS32

	select CPU_MIPSR2

	select CPU_HAS_PREFETCH

	select CPU_HAS_LOAD_STORE_LR

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM

	select CPU_SUPPORTS_CPUFREQ

	select LEDS_GPIO_REGISTER

	help

	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32

	  Release 1 instruction set and part of the MIPS32 Release 2

	  instruction set.

	  The Loongson GS232 microarchitecture implements the MIPS32 Release 1

	  instruction set and part of the MIPS32 Release 2 instruction set.



config CPU_MIPS32_R1

	bool "MIPS32 Release 1"
@@ -1838,15 +1850,6 @@ config CPU_LOONGSON2EF 
	select CPU_SUPPORTS_HUGEPAGES

	select RTC_MC146818_LIB



config CPU_LOONGSON32

	bool

	select CPU_MIPS32

	select CPU_MIPSR2

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM

	select CPU_SUPPORTS_CPUFREQ



config CPU_BMIPS32_3300

	select SMP_UP if SMP

	bool
@@ -1884,10 +1887,7 @@ config SYS_HAS_CPU_LOONGSON2F 
	select CPU_SUPPORTS_CPUFREQ

	select CPU_SUPPORTS_ADDRWINCFG if 64BIT



config SYS_HAS_CPU_LOONGSON1B

	bool



config SYS_HAS_CPU_LOONGSON1C

config SYS_HAS_CPU_LOONGSON32

	bool



config SYS_HAS_CPU_MIPS32_R1
@@ -2986,8 +2986,8 @@ choice 
	prompt "Kernel command line type"

	depends on !CMDLINE_OVERRIDE

	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \

					 !MACH_LOONGSON64 && !MIPS_MALTA && \

					 !CAVIUM_OCTEON_SOC

					 !MACH_LOONGSON64 && !MACH_LOONGSON32 && \

					 !MIPS_MALTA && !CAVIUM_OCTEON_SOC

	default MIPS_CMDLINE_FROM_BOOTLOADER



	config MIPS_CMDLINE_FROM_DTB

arch/mips/alchemy/common/clock.c

+11 −7
Original line number Diff line number Diff line
@@ -211,30 +211,34 @@ static int alchemy_clk_aux_setr(struct clk_hw *hw, 
	return 0;

}



static long alchemy_clk_aux_roundr(struct clk_hw *hw,

					    unsigned long rate,

					    unsigned long *parent_rate)

static int alchemy_clk_aux_determine_rate(struct clk_hw *hw,

					  struct clk_rate_request *req)

{

	struct alchemy_auxpll_clk *a = to_auxpll_clk(hw);

	unsigned long mult;



	if (!rate || !*parent_rate)

	if (!req->rate || !req->best_parent_rate) {

		req->rate = 0;



		return 0;

	}



	mult = rate / (*parent_rate);

	mult = req->rate / req->best_parent_rate;



	if (mult && (mult < 7))

		mult = 7;

	if (mult > a->maxmult)

		mult = a->maxmult;



	return (*parent_rate) * mult;

	req->rate = req->best_parent_rate * mult;



	return 0;

}



static const struct clk_ops alchemy_clkops_aux = {

	.recalc_rate	= alchemy_clk_aux_recalc,

	.set_rate	= alchemy_clk_aux_setr,

	.round_rate	= alchemy_clk_aux_roundr,

	.determine_rate = alchemy_clk_aux_determine_rate,

};



static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,