Commit 6ab42fa0 authored by Vinay Belgaumkar's avatar Vinay Belgaumkar Committed by Lucas De Marchi
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drm/xe/bmg: Update Wa_16023588340 



This allows for additional L2 caching modes.

Fixes: 01570b44 ("drm/xe/bmg: implement Wa_16023588340")
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Signed-off-by: default avatarVinay Belgaumkar <vinay.belgaumkar@intel.com>
Link: https://lore.kernel.org/r/20250612-wa-14022085890-v4-2-94ba5dcc1e30@intel.com


Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent fa424387

drivers/gpu/drm/xe/xe_gt.c

+1 −1
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ static void xe_gt_enable_host_l2_vram(struct xe_gt *gt) 
		xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);

	}



	xe_gt_mcr_multicast_write(gt, XEHPC_L3CLOS_MASK(3), 0x3);

	xe_gt_mcr_multicast_write(gt, XEHPC_L3CLOS_MASK(3), 0xF);

	xe_force_wake_put(gt_to_fw(gt), fw_ref);

}