Commit 6ac51318 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mtd/fixes-for-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux 

Pull MTD fixes from Miquel Raynal:

 - In SPI NOR, there was an issue with the RDCR capability, leading to
   several platforms no longer capable of using it for wrong reasons
   (the follow-up commit renames the helper to avoid future confusion)

 - NAND controller drivers needed to be improved to fix some timings, a
   locking schenario and avoid certain operations during panic writes

 - The Spear600 DT binding conversion was done partially, leading to
   several warnings which have individually been fixed

 - Tudor gets replaced by Takahiro for the SPI NOR maintainance

 - Plus two more misc fixes

* tag 'mtd/fixes-for-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux:
  mtd: rawnand: pl353: make sure optimal timings are applied
  mtd: spi-nor: Rename spi_nor_spimem_check_op()
  mtd: spi-nor: Fix RDCR controller capability core check
  mtd: rawnand: brcmnand: skip DMA during panic write
  mtd: rawnand: serialize lock/unlock against other NAND operations
  dt-bindings: mtd: st,spear600-smi: Fix example
  dt-bindings: mtd: st,spear600-smi: #address/size-cells is mandatory
  dt-bindings: mtd: st,spear600-smi: Fix description
  mtd: rawnand: cadence: Fix error check for dma_alloc_coherent() in cadence_nand_init()
  mtd: Avoid boot crash in RedBoot partition table parser
  MAINTAINERS: add Takahiro Kuwano as SPI NOR reviewer
  MAINTAINERS: remove Tudor Ambarus as SPI NOR maintainer
parents 47e231cb b9465b04

Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml

+19 −7
Original line number Diff line number Diff line
@@ -19,9 +19,6 @@ description: 
  Flash sub nodes describe the memory range and optional per-flash

  properties.



allOf:

  - $ref: mtd.yaml#



properties:

  compatible:

    const: st,spear600-smi
@@ -42,14 +39,29 @@ properties: 
    $ref: /schemas/types.yaml#/definitions/uint32

    description: Functional clock rate of the SMI controller in Hz.



patternProperties:

  "^flash@.*$":

    $ref: /schemas/mtd/mtd.yaml#



    properties:

      reg:

        maxItems: 1



      st,smi-fast-mode:

        type: boolean

        description: Indicates that the attached flash supports fast read mode.



    unevaluatedProperties: false



    required:

      - reg



required:

  - compatible

  - reg

  - clock-rate

  - "#address-cells"

  - "#size-cells"



unevaluatedProperties: false
@@ -64,7 +76,7 @@ examples: 
        interrupts = <12>;

        clock-rate = <50000000>;  /* 50 MHz */



        flash@f8000000 {

        flash@fc000000 {

            reg = <0xfc000000 0x1000>;

            st,smi-fast-mode;

        };

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -24902,9 +24902,9 @@ F: drivers/clk/spear/ 
F:	drivers/pinctrl/spear/









SPI NOR SUBSYSTEM









M:	Tudor Ambarus <tudor.ambarus@linaro.org>









M:	Pratyush Yadav <pratyush@kernel.org>









M:	Michael Walle <mwalle@kernel.org>









R:	Takahiro Kuwano <takahiro.kuwano@infineon.com>









L:	linux-mtd@lists.infradead.org









S:	Maintained









W:	http://www.linux-mtd.infradead.org/

























drivers/mtd/nand/raw/brcmnand/brcmnand.c



+2
−4






























Original line number
Diff line number
Diff line







@@ -2350,14 +2350,12 @@ static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip,







	for (i = 0; i < ctrl->max_oob; i += 4)









		oob_reg_write(ctrl, i, 0xffffffff);



















	if (mtd->oops_panic_write)









	if (mtd->oops_panic_write) {









		/* switch to interrupt polling and PIO mode */









		disable_ctrl_irqs(ctrl);



















	if (use_dma(ctrl) && (has_edu(ctrl) || !oob) && flash_dma_buf_ok(buf)) {









	} else if (use_dma(ctrl) && (has_edu(ctrl) || !oob) && flash_dma_buf_ok(buf)) {









		if (ctrl->dma_trans(host, addr, (u32 *)buf, oob, mtd->writesize,









				    CMD_PROGRAM_PAGE))



















			ret = -EIO;



















		goto out;
































drivers/mtd/nand/raw/cadence-nand-controller.c



+1
−1






























Original line number
Diff line number
Diff line







@@ -3133,7 +3133,7 @@ static int cadence_nand_init(struct cdns_nand_ctrl *cdns_ctrl)







						  sizeof(*cdns_ctrl->cdma_desc),









						  &cdns_ctrl->dma_cdma_desc,









						  GFP_KERNEL);









	if (!cdns_ctrl->dma_cdma_desc)









	if (!cdns_ctrl->cdma_desc)









		return -ENOMEM;



















	cdns_ctrl->buf_size = SZ_16K;
































drivers/mtd/nand/raw/nand_base.c



+12
−2






























Original line number
Diff line number
Diff line







@@ -4737,11 +4737,16 @@ static void nand_shutdown(struct mtd_info *mtd)







static int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)









{









	struct nand_chip *chip = mtd_to_nand(mtd);









	int ret;



















	if (!chip->ops.lock_area)









		return -ENOTSUPP;



















	return chip->ops.lock_area(chip, ofs, len);









	nand_get_device(chip);









	ret = chip->ops.lock_area(chip, ofs, len);









	nand_release_device(chip);



















	return ret;









}



















/**








@@ -4753,11 +4758,16 @@ static int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)







static int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)









{









	struct nand_chip *chip = mtd_to_nand(mtd);









	int ret;



















	if (!chip->ops.unlock_area)









		return -ENOTSUPP;



















	return chip->ops.unlock_area(chip, ofs, len);









	nand_get_device(chip);









	ret = chip->ops.unlock_area(chip, ofs, len);









	nand_release_device(chip);



















	return ret;









}



















/* Set default functions */