Commit 6ac55eab authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: move reset support type checks into the caller



Rather than checking in the callbacks, check if the reset
type is supported in the caller.

Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ea2791d0
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+4 −1
Original line number Diff line number Diff line
@@ -112,6 +112,7 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job)
		amdgpu_job_core_dump(adev, job);

	if (amdgpu_gpu_recovery &&
	    amdgpu_ring_is_reset_type_supported(ring, AMDGPU_RESET_TYPE_SOFT_RESET) &&
	    amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) {
		dev_err(adev->dev, "ring %s timeout, but soft recovered\n",
			s_job->sched->name);
@@ -131,7 +132,9 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job)
	/* attempt a per ring reset */
	if (unlikely(adev->debug_disable_gpu_ring_reset)) {
		dev_err(adev->dev, "Ring reset disabled by debug mask\n");
	} else if (amdgpu_gpu_recovery && ring->funcs->reset) {
	} else if (amdgpu_gpu_recovery &&
		   amdgpu_ring_is_reset_type_supported(ring, AMDGPU_RESET_TYPE_PER_QUEUE) &&
		   ring->funcs->reset) {
		dev_err(adev->dev, "Starting %s ring reset\n",
			s_job->sched->name);
		r = amdgpu_ring_reset(ring, job->vmid, &job->hw_fence);
+31 −0
Original line number Diff line number Diff line
@@ -825,3 +825,34 @@ int amdgpu_ring_reset_helper_end(struct amdgpu_ring *ring,
	drm_sched_wqueue_start(&ring->sched);
	return 0;
}

bool amdgpu_ring_is_reset_type_supported(struct amdgpu_ring *ring,
					 u32 reset_type)
{
	switch (ring->funcs->type) {
	case AMDGPU_RING_TYPE_GFX:
		if (ring->adev->gfx.gfx_supported_reset & reset_type)
			return true;
		break;
	case AMDGPU_RING_TYPE_COMPUTE:
		if (ring->adev->gfx.compute_supported_reset & reset_type)
			return true;
		break;
	case AMDGPU_RING_TYPE_SDMA:
		if (ring->adev->sdma.supported_reset & reset_type)
			return true;
		break;
	case AMDGPU_RING_TYPE_VCN_DEC:
	case AMDGPU_RING_TYPE_VCN_ENC:
		if (ring->adev->vcn.supported_reset & reset_type)
			return true;
		break;
	case AMDGPU_RING_TYPE_VCN_JPEG:
		if (ring->adev->jpeg.supported_reset & reset_type)
			return true;
		break;
	default:
		break;
	}
	return false;
}
+2 −0
Original line number Diff line number Diff line
@@ -568,4 +568,6 @@ void amdgpu_ring_reset_helper_begin(struct amdgpu_ring *ring,
				    struct amdgpu_fence *guilty_fence);
int amdgpu_ring_reset_helper_end(struct amdgpu_ring *ring,
				 struct amdgpu_fence *guilty_fence);
bool amdgpu_ring_is_reset_type_supported(struct amdgpu_ring *ring,
					 u32 reset_type);
#endif
+0 −3
Original line number Diff line number Diff line
@@ -1522,9 +1522,6 @@ int amdgpu_vcn_ring_reset(struct amdgpu_ring *ring,
{
	struct amdgpu_device *adev = ring->adev;

	if (!(adev->vcn.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
		return -EOPNOTSUPP;

	if (adev->vcn.inst[ring->me].using_unified_queue)
		return -EINVAL;

+0 −6
Original line number Diff line number Diff line
@@ -9523,9 +9523,6 @@ static int gfx_v10_0_reset_kgq(struct amdgpu_ring *ring,
	u64 addr;
	int r;

	if (!(adev->gfx.gfx_supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
		return -EOPNOTSUPP;

	if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
		return -EINVAL;

@@ -9591,9 +9588,6 @@ static int gfx_v10_0_reset_kcq(struct amdgpu_ring *ring,
	unsigned long flags;
	int i, r;

	if (!(adev->gfx.compute_supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
		return -EOPNOTSUPP;

	if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
		return -EINVAL;

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