Commit 6b079d8f authored by Parthiban Veerasooran's avatar Parthiban Veerasooran Committed by Jakub Kicinski
Browse files

net: phy: microchip_t1s: add support for Microchip's LAN867X Rev.C2 

Add support for LAN8670/1/2 Rev.C2 as per the latest configuration note
AN1699 released (Revision E (DS60001699F - June 2024)) for Rev.C1 is also
applicable for Rev.C2. Refer hardware revisions list in the latest AN1699
Revision E (DS60001699F - June 2024).
https://www.microchip.com/en-us/application-notes/an1699



Signed-off-by: default avatarParthiban Veerasooran <parthiban.veerasooran@microchip.com>
Link: https://patch.msgid.link/20241010082205.221493-7-parthiban.veerasooran@microchip.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 662d9c5f

drivers/net/phy/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -292,8 +292,8 @@ config MICREL_PHY 
config MICROCHIP_T1S_PHY

	tristate "Microchip 10BASE-T1S Ethernet PHYs"

	help

	  Currently supports the LAN8670/1/2 Rev.B1/C1 and LAN8650/1 Rev.B0/B1

	  Internal PHYs.

	  Currently supports the LAN8670/1/2 Rev.B1/C1/C2 and

	  LAN8650/1 Rev.B0/B1 Internal PHYs.



config MICROCHIP_PHY

	tristate "Microchip PHYs"

drivers/net/phy/microchip_t1s.c

+17 −5
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ 
 * Driver for Microchip 10BASE-T1S PHYs

 *

 * Support: Microchip Phys:

 *  lan8670/1/2 Rev.B1/C1

 *  lan8670/1/2 Rev.B1/C1/C2

 *  lan8650/1 Rev.B0/B1 Internal PHYs

 */
@@ -13,6 +13,7 @@ 


#define PHY_ID_LAN867X_REVB1 0x0007C162

#define PHY_ID_LAN867X_REVC1 0x0007C164

#define PHY_ID_LAN867X_REVC2 0x0007C165

/* Both Rev.B0 and B1 clause 22 PHYID's are same due to B1 chip limitation */

#define PHY_ID_LAN865X_REVB 0x0007C1B3
@@ -292,7 +293,7 @@ static int lan867x_check_reset_complete(struct phy_device *phydev) 
	return 0;

}



static int lan867x_revc1_config_init(struct phy_device *phydev)

static int lan867x_revc_config_init(struct phy_device *phydev)

{

	s8 offsets[2];

	int ret;
@@ -305,10 +306,10 @@ static int lan867x_revc1_config_init(struct phy_device *phydev) 
	if (ret)

		return ret;



	/* LAN867x Rev.C1 configuration settings are equal to the first 9

	/* LAN867x Rev.C1/C2 configuration settings are equal to the first 9

	 * configuration settings and all the sqi fixup settings from LAN865x

	 * Rev.B0/B1. So the same fixup registers and values from LAN865x

	 * Rev.B0/B1 are used for LAN867x Rev.C1 to avoid duplication.

	 * Rev.B0/B1 are used for LAN867x Rev.C1/C2 to avoid duplication.

	 * Refer the below links for the comparison.

	 * https://www.microchip.com/en-us/application-notes/an1760

	 * Revision F (DS60001760G - June 2024)
@@ -428,7 +429,17 @@ static struct phy_driver microchip_t1s_driver[] = { 
		PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC1),

		.name               = "LAN867X Rev.C1",

		.features           = PHY_BASIC_T1S_P2MP_FEATURES,

		.config_init        = lan867x_revc1_config_init,

		.config_init        = lan867x_revc_config_init,

		.read_status        = lan86xx_read_status,

		.get_plca_cfg	    = genphy_c45_plca_get_cfg,

		.set_plca_cfg	    = genphy_c45_plca_set_cfg,

		.get_plca_status    = genphy_c45_plca_get_status,

	},

	{

		PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC2),

		.name               = "LAN867X Rev.C2",

		.features           = PHY_BASIC_T1S_P2MP_FEATURES,

		.config_init        = lan867x_revc_config_init,

		.read_status        = lan86xx_read_status,

		.get_plca_cfg	    = genphy_c45_plca_get_cfg,

		.set_plca_cfg	    = genphy_c45_plca_set_cfg,
@@ -453,6 +464,7 @@ module_phy_driver(microchip_t1s_driver); 
static struct mdio_device_id __maybe_unused tbl[] = {

	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVB1) },

	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC1) },

	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC2) },

	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN865X_REVB) },

	{ }

};