Commit 6b0a9bf7 authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Alex Deucher
Browse files

drm/amd/display: Remove unused dml2_core_ip_params struct 



Acked-by: default avatarJerry Zuo <jerry.zuo@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 48eba830

drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c

+0 −78
Original line number Diff line number Diff line
@@ -77,84 +77,6 @@ struct dml2_core_ip_params core_dcn4_ip_caps_base = { 
	.subvp_swath_height_margin_lines = 16,

};



struct dml2_core_ip_params core_dcn4sw_ip_caps_base = {

	.vblank_nom_default_us = 668,

	.remote_iommu_outstanding_translations = 256,

	.rob_buffer_size_kbytes = 192,

	.config_return_buffer_size_in_kbytes = 1280,

	.config_return_buffer_segment_size_in_kbytes = 64,

	.compressed_buffer_segment_size_in_kbytes = 64,

	.dpte_buffer_size_in_pte_reqs_luma = 68,

	.dpte_buffer_size_in_pte_reqs_chroma = 36,

	.pixel_chunk_size_kbytes = 8,

	.alpha_pixel_chunk_size_kbytes = 4,

	.min_pixel_chunk_size_bytes = 1024,

	.writeback_chunk_size_kbytes = 8,

	.line_buffer_size_bits = 1171920,

	.max_line_buffer_lines = 32,

	.writeback_interface_buffer_size_kbytes = 90,



	//Number of pipes after DCN Pipe harvesting

	.max_num_dpp = 4,

	.max_num_otg = 4,

	.max_num_wb = 1,

	.max_dchub_pscl_bw_pix_per_clk = 4,

	.max_pscl_lb_bw_pix_per_clk = 2,

	.max_lb_vscl_bw_pix_per_clk = 4,

	.max_vscl_hscl_bw_pix_per_clk = 4,

	.max_hscl_ratio = 6,

	.max_vscl_ratio = 6,

	.max_hscl_taps = 8,

	.max_vscl_taps = 8,

	.dispclk_ramp_margin_percent = 1,

	.dppclk_delay_subtotal = 47,

	.dppclk_delay_scl = 50,

	.dppclk_delay_scl_lb_only = 16,

	.dppclk_delay_cnvc_formatter = 28,

	.dppclk_delay_cnvc_cursor = 6,

	.cursor_buffer_size = 24,

	.cursor_chunk_size = 2,

	.dispclk_delay_subtotal = 125,

	.max_inter_dcn_tile_repeaters = 8,

	.writeback_max_hscl_ratio = 1,

	.writeback_max_vscl_ratio = 1,

	.writeback_min_hscl_ratio = 1,

	.writeback_min_vscl_ratio = 1,

	.writeback_max_hscl_taps = 1,

	.writeback_max_vscl_taps = 1,

	.writeback_line_buffer_buffer_size = 0,

	.num_dsc = 4,

	.maximum_dsc_bits_per_component = 12,

	.maximum_pixels_per_line_per_dsc_unit = 5760,

	.dsc422_native_support = true,

	.dcc_supported = true,

	.ptoi_supported = false,



	.cursor_64bpp_support = true,

	.dynamic_metadata_vm_enabled = false,



	.max_num_hdmi_frl_outputs = 1,

	.max_num_dp2p0_outputs = 4,

	.max_num_dp2p0_streams = 4,

	.imall_supported = 1,

	.max_flip_time_us = 80,

	.words_per_channel = 16,



	.subvp_fw_processing_delay_us = 15,

	.subvp_pstate_allow_width_us = 20,

	.subvp_swath_height_margin_lines = 16,



	.dcn_mrq_present = 1,

	.zero_size_buffer_entries = 512,

	.compbuf_reserved_space_zs = 64,

	.dcc_meta_buffer_size_bytes = 6272,

	.meta_chunk_size_kbytes = 2,

	.min_meta_chunk_size_bytes = 256,



	.dchub_arb_to_ret_delay = 102,

	.hostvm_mode = 1,

};



static void patch_ip_caps_with_explicit_ip_params(struct dml2_ip_capabilities *ip_caps, const struct dml2_core_ip_params *ip_params)

{

	ip_caps->pipe_count = ip_params->max_num_dpp;