Commit 6b5ef8c8 authored by Jamie Gibbons's avatar Jamie Gibbons Committed by Bartosz Golaszewski
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dt-bindings: gpio: fix microchip #interrupt-cells 



The GPIO controller on PolarFire SoC supports more than one type of
interrupt and needs two interrupt cells.

Fixes: 735806d8 ("dt-bindings: gpio: add bindings for microchip mpfs gpio")
Signed-off-by: default avatarJamie Gibbons <jamie.gibbons@microchip.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260326-wise-gumdrop-49217723a72a@spud


Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
parent 310a4a9c

Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml

+2 −2
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ properties: 
    const: 2



  "#interrupt-cells":

    const: 1

    const: 2



  ngpios:

    description:
@@ -86,7 +86,7 @@ examples: 
        gpio-controller;

        #gpio-cells = <2>;

        interrupt-controller;

        #interrupt-cells = <1>;

        #interrupt-cells = <2>;

        interrupts = <53>, <53>, <53>, <53>,

                     <53>, <53>, <53>, <53>,

                     <53>, <53>, <53>, <53>,