Commit 6b85a71c authored by Miquel Raynal's avatar Miquel Raynal
Browse files

dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 & RZ/N1 NAND controller 



Add a Yaml description for this Renesas NAND controller.

As this controller is embedded on different SoC families, provide:
* a family-specific "r-car-gen3" compatible and a more specific
  "r8a77951" one
* a family-specific "rzn1" compatible and a more specific "r9a06g032"
  one

More compatibles can be added later if new SoCs with this controller
must be supported.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/linux-mtd/20211217142033.353599-2-miquel.raynal@bootlin.com
parent 35a441ee

Documentation/devicetree/bindings/mtd/renesas-nandc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mtd/renesas-nandc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Renesas R-Car Gen3 & RZ/N1x NAND flash controller device tree bindings



maintainers:

  - Miquel Raynal <miquel.raynal@bootlin.com>



allOf:

  - $ref: "nand-controller.yaml"



properties:

  compatible:

    oneOf:

      - items:

          - enum:

              - renesas,r9a06g032-nandc

          - const: renesas,rzn1-nandc



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: APB host controller clock

      - description: External NAND bus clock



  clock-names:

    items:

      - const: hclk

      - const: eclk



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - interrupts



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/r9a06g032-sysctrl.h>



    nand-controller@40102000 {

        compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";

        reg = <0x40102000 0x2000>;

        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>;

        clock-names = "hclk", "eclk";

        #address-cells = <1>;

        #size-cells = <0>;

    };