Commit 6be4a607 authored by Jesse Barnes's avatar Jesse Barnes Committed by Chris Wilson
Browse files

drm/i915: split Ironlake CRTC enable/disable code 



This way we can also use it in CRTC prepare/commit.  Also makes it
easier to split out FDI and other code.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent e642abbf

drivers/gpu/drm/i915/intel_display.c

+310 −281
Original line number Diff line number Diff line
@@ -1848,7 +1848,7 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc) 
	DRM_DEBUG_KMS("FDI train done.\n");

}



static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)

static void ironlake_crtc_enable(struct drm_crtc *crtc)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1881,15 +1881,6 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) 
	temp = I915_READ(pipeconf_reg);

	pipe_bpc = temp & PIPE_BPC_MASK;



	/* XXX: When our outputs are all unaware of DPMS modes other than off

	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.

	 */

	switch (mode) {

	case DRM_MODE_DPMS_ON:

	case DRM_MODE_DPMS_STANDBY:

	case DRM_MODE_DPMS_SUSPEND:

		DRM_DEBUG_KMS("crtc %d/%d dpms on\n", pipe, plane);



	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {

		temp = I915_READ(PCH_LVDS);

		if ((temp & LVDS_PORT_EN) == 0) {
@@ -1899,7 +1890,6 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) 
	}



	if (!HAS_eDP) {



		/* enable PCH FDI RX PLL, wait warmup plus DMI latency */

		temp = I915_READ(fdi_rx_reg);

		/*
@@ -1988,7 +1978,6 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) 
			I915_WRITE(PCH_DPLL_SEL, temp);

			I915_READ(PCH_DPLL_SEL);

		}



		/* set transcoder timing */

		I915_WRITE(trans_htot_reg, I915_READ(cpu_htot_reg));

		I915_WRITE(trans_hblank_reg, I915_READ(cpu_hblank_reg));
@@ -2074,10 +2063,28 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) 
	intel_crtc_load_lut(crtc);



	intel_update_fbc(crtc, &crtc->mode);

		break;

}



	case DRM_MODE_DPMS_OFF:

		DRM_DEBUG_KMS("crtc %d/%d dpms off\n", pipe, plane);

static void ironlake_crtc_disable(struct drm_crtc *crtc)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int pipe = intel_crtc->pipe;

	int plane = intel_crtc->plane;

	int pch_dpll_reg = (pipe == 0) ? PCH_DPLL_A : PCH_DPLL_B;

	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;

	int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;

	int dspbase_reg = (plane == 0) ? DSPAADDR : DSPBADDR;

	int fdi_tx_reg = (pipe == 0) ? FDI_TXA_CTL : FDI_TXB_CTL;

	int fdi_rx_reg = (pipe == 0) ? FDI_RXA_CTL : FDI_RXB_CTL;

	int transconf_reg = (pipe == 0) ? TRANSACONF : TRANSBCONF;

	int trans_dpll_sel = (pipe == 0) ? 0 : 1;

	u32 temp;

	u32 pipe_bpc;



	temp = I915_READ(pipeconf_reg);

	pipe_bpc = temp & PIPE_BPC_MASK;



	drm_vblank_off(dev, pipe);

	/* Disable display plane */
@@ -2214,6 +2221,28 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) 


	/* Wait for the clocks to turn off. */

	udelay(100);

}



static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)

{

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int pipe = intel_crtc->pipe;

	int plane = intel_crtc->plane;



	/* XXX: When our outputs are all unaware of DPMS modes other than off

	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.

	 */

	switch (mode) {

	case DRM_MODE_DPMS_ON:

	case DRM_MODE_DPMS_STANDBY:

	case DRM_MODE_DPMS_SUSPEND:

		DRM_DEBUG_KMS("crtc %d/%d dpms on\n", pipe, plane);

		ironlake_crtc_enable(crtc);

		break;



	case DRM_MODE_DPMS_OFF:

		DRM_DEBUG_KMS("crtc %d/%d dpms off\n", pipe, plane);

		ironlake_crtc_disable(crtc);

		break;

	}

}