Commit 6c2a1f4f authored by Tarang Raval's avatar Tarang Raval Committed by Shawn Guo
Browse files

arm64: dts: imx8mp-var-som-symphony: Add Variscite Symphony board and VAR-SOM-MX8MP SoM 



Adds the DTSI file for the Variscite VAR-SOM-MX8MP System on Module which
is delivered with the Variscite Symphony Evaluation Kit.

Initial support includes:
- Serial console
- eMMC
- SD card

Signed-off-by: default avatarTarang Raval <tarang.raval@siliconsignals.io>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 1a15e675

arch/arm64/boot/dts/freescale/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -181,6 +181,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-mi1010ait-1cp1.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb

arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts

0 → 100644
+11 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright 2024 Variscite Ltd.

 */



#include "imx8mp-var-som.dtsi"



/ {

	model = "Variscite VAR-SOM-MX8M-PLUS on Symphony-Board";

	compatible = "variscite,var-som-mx8mp-symphony", "variscite,var-som-mx8mp", "fsl,imx8mp";

};

arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi

0 → 100644
+359 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright 2024 Variscite Ltd.

 *

 * Author: Tarang Raval <tarang.raval@siliconsignals.io>

 */



/dts-v1/;



#include <dt-bindings/phy/phy-imx8-pcie.h>

#include <dt-bindings/leds/common.h>

#include <dt-bindings/usb/pd.h>

#include "imx8mp.dtsi"



/ {

	model = "Variscite VAR-SOM-MX8M Plus module";



	chosen {

		stdout-path = &uart2;

	};



	gpio-leds {

	        compatible = "gpio-leds";



	        led-0 {

	                function = LED_FUNCTION_POWER;

	                gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;

	                linux,default-trigger = "heartbeat";

	        };

	};



	memory@40000000 {

		device_type = "memory";

		reg = <0x0 0x40000000 0 0xc0000000>,

		      <0x1 0x00000000 0 0xc0000000>;

	};





	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {

	        compatible = "regulator-fixed";

	        regulator-name = "VSD_3V3";

	        regulator-min-microvolt = <3300000>;

	        regulator-max-microvolt = <3300000>;

	        gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;

	        enable-active-high;

	        startup-delay-us = <100>;

	        off-on-delay-us = <12000>;

	};

};



&A53_0 {

	cpu-supply = <&buck2>;

};



&A53_1 {

	cpu-supply = <&buck2>;

};



&A53_2 {

	cpu-supply = <&buck2>;

};



&A53_3 {

	cpu-supply = <&buck2>;

};



&i2c1 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c1>;

	status = "okay";



	pmic@25 {

		compatible = "nxp,pca9450c";

		reg = <0x25>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_pmic>;

		interrupt-parent = <&gpio5>;

		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;



		regulators {

			buck1: BUCK1 {

				regulator-name = "BUCK1";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <2187500>;

				regulator-boot-on;

				regulator-always-on;

				regulator-ramp-delay = <3125>;

			};



			buck2: BUCK2 {

				regulator-name = "BUCK2";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <2187500>;

				regulator-boot-on;

				regulator-always-on;

				regulator-ramp-delay = <3125>;

				nxp,dvs-run-voltage = <950000>;

				nxp,dvs-standby-voltage = <850000>;

			};



			buck4: BUCK4 {

				regulator-name = "BUCK4";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <3400000>;

				regulator-boot-on;

				regulator-always-on;

			};



			buck5: BUCK5 {

				regulator-name = "BUCK5";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <3400000>;

				regulator-boot-on;

				regulator-always-on;

			};



			buck6: BUCK6 {

				regulator-name = "BUCK6";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <3400000>;

				regulator-boot-on;

				regulator-always-on;

			};



			ldo1: LDO1 {

				regulator-name = "LDO1";

				regulator-min-microvolt = <1600000>;

				regulator-max-microvolt = <3300000>;

				regulator-boot-on;

				regulator-always-on;

			};



			ldo2: LDO2 {

				regulator-name = "LDO2";

				regulator-min-microvolt = <800000>;

				regulator-max-microvolt = <1150000>;

				regulator-boot-on;

				regulator-always-on;

			};



			ldo3: LDO3 {

				regulator-name = "LDO3";

				regulator-min-microvolt = <800000>;

				regulator-max-microvolt = <3300000>;

				regulator-boot-on;

				regulator-always-on;

			};



			ldo4: LDO4 {

				regulator-name = "LDO4";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-always-on;

			};



			ldo5: LDO5 {

				regulator-name = "LDO5";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

			};

		};

	};

};



&i2c3 {

        clock-frequency = <400000>;

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_i2c3>;

        status = "okay";



	/* GPIO expander */

	pca9534: gpio@20 {

	        compatible = "nxp,pca9534";

	        reg = <0x20>;

	        pinctrl-names = "default";

	        pinctrl-0 = <&pinctrl_pca9534>;

	        gpio-controller;

	        #gpio-cells = <2>;

	        interrupt-parent = <&gpio1>;

	        interrupts = <15 IRQ_TYPE_EDGE_FALLING>;

	        wakeup-source;



	        usb3-sata-sel-hog {

	                gpio-hog;

	                gpios = <4 0>;

	                output-low;

	                line-name = "usb3_sata_sel";

	        };

	};

};



/* Console */

&uart2 {

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_uart2>;

        status = "okay";

};



/* SD-card */

&usdhc2 {

        pinctrl-names = "default", "state_100mhz", "state_200mhz";

        pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;

        pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;

        pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;

        cd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;

        vmmc-supply = <&reg_usdhc2_vmmc>;

        bus-width = <4>;

        status = "okay";

};



/* eMMC */

&usdhc3 {

	pinctrl-names = "default", "state_100mhz", "state_200mhz";

	pinctrl-0 = <&pinctrl_usdhc3>;

	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;

	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;

	bus-width = <8>;

	non-removable;

	status = "okay";

};



&wdog1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_wdog>;

	fsl,ext-reset-output;

	status = "okay";

};



&iomuxc {



	pinctrl_i2c1: i2c1grp {

		fsl,pins = <

			MX8MP_IOMUXC_SD1_DATA4__I2C1_SCL				0x400001c2

			MX8MP_IOMUXC_SD1_DATA5__I2C1_SDA				0x400001c2

		>;

	};



	pinctrl_i2c3: i2c3grp {

	        fsl,pins = <

	                MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL                                 0x400001c2

	                MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA                                 0x400001c2

	        >;

	};



	pinctrl_pca9534: pca9534grp {

	        fsl,pins = <

	                MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15                             0xc0

	        >;

	};



	pinctrl_pmic: pmicgrp {

		fsl,pins = <

			MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04				0x1c0

		>;

	};



	pinctrl_uart2: uart2grp {

	        fsl,pins = <

		        MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX                            0x40

			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX                            0x40

		>;

	};



	pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

	        fsl,pins = <

	                MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14                             0x1c4

	                MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22                               0x10

	                MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12                               0xc0

	        >;

	};



	pinctrl_usdhc2: usdhc2grp {

	        fsl,pins = <

	                MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                0x190

	                MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                0x1d0

	                MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                            0x1d0

	                MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                            0x1d0

	                MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                            0x1d0

	                MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                            0x1d0

	        >;

	};



	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {

	        fsl,pins = <

	                MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                0x194

	                MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                0x1d4

	                MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                            0x1d4

	                MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                            0x1d4

	                MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                            0x1d4

	                MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                            0x1d4

	        >;

	};



	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {

	        fsl,pins = <

	                MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                0x196

	                MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                0x1d6

	                MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                            0x1d6

	                MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                            0x1d6

	                MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                            0x1d6

	                MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                            0x1d6

	        >;

	};



	pinctrl_usdhc3: usdhc3grp {

		fsl,pins = <

			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK				0x190

			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD				0x1d0

			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0				0x1d0

			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1				0x1d0

			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2				0x1d0

			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3				0x1d0

			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4				0x1d0

			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5				0x1d0

			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6				0x1d0

			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7				0x1d0

			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE				0x190

		>;

	};



	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {

		fsl,pins = <

			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK				0x194

			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD				0x1d4

			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0				0x1d4

			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1				0x1d4

			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2				0x1d4

			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3				0x1d4

			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4				0x1d4

			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5				0x1d4

			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6				0x1d4

			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7				0x1d4

			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE				0x194

		>;

	};



	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {

		fsl,pins = <

			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK				0x196

			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD				0x1d6

			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0				0x1d6

			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1				0x1d6

			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2				0x1d6

			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3				0x1d6

			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4				0x1d6

			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5				0x1d6

			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6				0x1d6

			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7				0x1d6

			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE				0x196

		>;

	};



	pinctrl_wdog: wdoggrp {

		fsl,pins = <

			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B				0xc6

		>;

	};

};