Commit 6d2dbd4c authored by Markuss Broks's avatar Markuss Broks Committed by Krzysztof Kozlowski
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pinctrl: samsung: Add Exynos9810 SoC specific data 



Add Samsung Exynos9810 SoC specific data to enable pinctrl
support for platforms based on Exynos9810.

Co-developed-by: default avatarMaksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: default avatarMaksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: default avatarMarkuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-8-b89de9441ea8@gmail.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent e830431e

drivers/pinctrl/samsung/pinctrl-exynos-arm64.c

+154 −0
Original line number Diff line number Diff line
@@ -767,6 +767,160 @@ const struct samsung_pinctrl_of_match_data exynos990_of_data __initconst = { 
	.num_ctrl	= ARRAY_SIZE(exynos990_pin_ctrl),

};



/* pin banks of exynos9810 pin-controller 0 (ALIVE) */

static const struct samsung_pin_bank_data exynos9810_pin_banks0[] __initconst = {

	EXYNOS850_PIN_BANK_EINTN(6, 0x000, "etc1"),

	EXYNOS850_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00),

	EXYNOS850_PIN_BANK_EINTW(8, 0x040, "gpa1", 0x04),

	EXYNOS850_PIN_BANK_EINTW(8, 0x060, "gpa2", 0x08),

	EXYNOS850_PIN_BANK_EINTW(8, 0x080, "gpa3", 0x0c),

	EXYNOS850_PIN_BANK_EINTN(6, 0x0A0, "gpq0"),

	EXYNOS850_PIN_BANK_EINTW(2, 0x0C0, "gpa4", 0x10),

};



/* pin banks of exynos9810 pin-controller 1 (AUD) */

static const struct samsung_pin_bank_data exynos9810_pin_banks1[] __initconst = {

	EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),

	EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpb1", 0x04),

	EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpb2", 0x08),

};



/* pin banks of exynos9810 pin-controller 2 (CHUB) */

static const struct samsung_pin_bank_data exynos9810_pin_banks2[] __initconst = {

	EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gph0", 0x00),

	EXYNOS850_PIN_BANK_EINTG(5, 0x020, "gph1", 0x04),

};



/* pin banks of exynos9810 pin-controller 3 (CMGP) */

static const struct samsung_pin_bank_data exynos9810_pin_banks3[] __initconst = {

	EXYNOS850_PIN_BANK_EINTW(1, 0x000, "gpm0", 0x00),

	EXYNOS850_PIN_BANK_EINTW(1, 0x020, "gpm1", 0x04),

	EXYNOS850_PIN_BANK_EINTW(1, 0x040, "gpm2", 0x08),

	EXYNOS850_PIN_BANK_EINTW(1, 0x060, "gpm3", 0x0C),

	EXYNOS850_PIN_BANK_EINTW(1, 0x080, "gpm4", 0x10),

	EXYNOS850_PIN_BANK_EINTW(1, 0x0A0, "gpm5", 0x14),

	EXYNOS850_PIN_BANK_EINTW(1, 0x0C0, "gpm6", 0x18),

	EXYNOS850_PIN_BANK_EINTW(1, 0x0E0, "gpm7", 0x1C),

	EXYNOS850_PIN_BANK_EINTW(1, 0x100, "gpm10", 0x20),

	EXYNOS850_PIN_BANK_EINTW(1, 0x120, "gpm11", 0x24),

	EXYNOS850_PIN_BANK_EINTW(1, 0x140, "gpm12", 0x28),

	EXYNOS850_PIN_BANK_EINTW(1, 0x160, "gpm13", 0x2C),

	EXYNOS850_PIN_BANK_EINTW(1, 0x180, "gpm14", 0x30),

	EXYNOS850_PIN_BANK_EINTW(1, 0x1A0, "gpm15", 0x34),

	EXYNOS850_PIN_BANK_EINTW(1, 0x1C0, "gpm16", 0x38),

	EXYNOS850_PIN_BANK_EINTW(1, 0x1E0, "gpm17", 0x3C),

	EXYNOS850_PIN_BANK_EINTW(1, 0x200, "gpm40", 0x40),

	EXYNOS850_PIN_BANK_EINTW(1, 0x220, "gpm41", 0x44),

	EXYNOS850_PIN_BANK_EINTW(1, 0x240, "gpm42", 0x48),

	EXYNOS850_PIN_BANK_EINTW(1, 0x260, "gpm43", 0x4C),

};



/* pin banks of exynos9810 pin-controller 4 (FSYS0) */

static const struct samsung_pin_bank_data exynos9810_pin_banks4[] __initconst = {

	EXYNOS850_PIN_BANK_EINTG(2, 0x000, "gpf0", 0x00),

};



/* pin banks of exynos9810 pin-controller 5 (FSYS1) */

static const struct samsung_pin_bank_data exynos9810_pin_banks5[] __initconst = {

	EXYNOS850_PIN_BANK_EINTG(7, 0x000, "gpf1", 0x00),

	EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpf2", 0x04),

};



/* pin banks of exynos9810 pin-controller 6 (PERIC0) */

static const struct samsung_pin_bank_data exynos9810_pin_banks6[] __initconst = {

	EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00),

	EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp1", 0x04),

	EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08),

	EXYNOS850_PIN_BANK_EINTG(4, 0x060, "gpp3", 0x0C),

	EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10),

	EXYNOS850_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14),

	EXYNOS850_PIN_BANK_EINTG(8, 0x0C0, "gpg2", 0x18),

};



/* pin banks of exynos9810 pin-controller 7 (PERIC1) */

static const struct samsung_pin_bank_data exynos9810_pin_banks7[] __initconst = {

	EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp4", 0x00),

	EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp5", 0x04),

	EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpp6", 0x08),

	EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpc0", 0x0C),

	EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpc1", 0x10),

	EXYNOS850_PIN_BANK_EINTG(4, 0x0A0, "gpd0", 0x14),

	EXYNOS850_PIN_BANK_EINTG(7, 0x0C0, "gpg3", 0x18),

};



/* pin banks of exynos9810 pin-controller 8 (VTS) */

static const struct samsung_pin_bank_data exynos9810_pin_banks8[] __initconst = {

	EXYNOS850_PIN_BANK_EINTG(3, 0x000, "gpt0", 0x00),

};



static const struct samsung_pin_ctrl exynos9810_pin_ctrl[] __initconst = {

	{

		/* pin-controller instance 0 ALIVE data */

		.pin_banks      = exynos9810_pin_banks0,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks0),

		.eint_wkup_init = exynos_eint_wkup_init,

		.eint_gpio_init = exynos_eint_gpio_init,

		.suspend        = exynos_pinctrl_suspend,

		.resume         = exynos_pinctrl_resume,

	}, {

		/* pin-controller instance 1 AUD data */

		.pin_banks      = exynos9810_pin_banks1,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks1),

	}, {

		/* pin-controller instance 2 CHUB data */

		.pin_banks      = exynos9810_pin_banks2,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks2),

		.eint_gpio_init = exynos_eint_gpio_init,

		.suspend        = exynos_pinctrl_suspend,

		.resume         = exynos_pinctrl_resume,

	}, {

		/* pin-controller instance 3 CMGP data */

		.pin_banks      = exynos9810_pin_banks3,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks3),

		.eint_wkup_init = exynos_eint_wkup_init,

		.eint_gpio_init = exynos_eint_gpio_init,

		.suspend        = exynos_pinctrl_suspend,

		.resume         = exynos_pinctrl_resume,

	}, {

		/* pin-controller instance 4 FSYS0 data */

		.pin_banks      = exynos9810_pin_banks4,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks4),

		.eint_gpio_init = exynos_eint_gpio_init,

		.suspend        = exynos_pinctrl_suspend,

		.resume         = exynos_pinctrl_resume,

	}, {

		/* pin-controller instance 5 FSYS1 data */

		.pin_banks      = exynos9810_pin_banks5,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks5),

		.eint_gpio_init = exynos_eint_gpio_init,

		.suspend        = exynos_pinctrl_suspend,

		.resume         = exynos_pinctrl_resume,

	}, {

		/* pin-controller instance 6 PERIC0 data */

		.pin_banks      = exynos9810_pin_banks6,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks6),

		.eint_gpio_init = exynos_eint_gpio_init,

		.suspend        = exynos_pinctrl_suspend,

		.resume         = exynos_pinctrl_resume,

	}, {

		/* pin-controller instance 7 PERIC1 data */

		.pin_banks      = exynos9810_pin_banks7,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks7),

		.eint_gpio_init = exynos_eint_gpio_init,

		.suspend        = exynos_pinctrl_suspend,

		.resume         = exynos_pinctrl_resume,

	}, {

		/* pin-controller instance 8 VTS data */

		.pin_banks      = exynos9810_pin_banks8,

		.nr_banks       = ARRAY_SIZE(exynos9810_pin_banks8),

	},

};



const struct samsung_pinctrl_of_match_data exynos9810_of_data __initconst = {

	.ctrl		= exynos9810_pin_ctrl,

	.num_ctrl	= ARRAY_SIZE(exynos9810_pin_ctrl),

};



/* pin banks of exynosautov9 pin-controller 0 (ALIVE) */

static const struct samsung_pin_bank_data exynosautov9_pin_banks0[] __initconst = {

	EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),

drivers/pinctrl/samsung/pinctrl-samsung.c

+2 −0
Original line number Diff line number Diff line
@@ -1479,6 +1479,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { 
		.data = &exynos850_of_data },

	{ .compatible = "samsung,exynos8895-pinctrl",

		.data = &exynos8895_of_data },

	{ .compatible = "samsung,exynos9810-pinctrl",

		.data = &exynos9810_of_data },

	{ .compatible = "samsung,exynos990-pinctrl",

		.data = &exynos990_of_data },

	{ .compatible = "samsung,exynosautov9-pinctrl",

drivers/pinctrl/samsung/pinctrl-samsung.h

+1 −0
Original line number Diff line number Diff line
@@ -385,6 +385,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data; 
extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;

extern const struct samsung_pinctrl_of_match_data exynos850_of_data;

extern const struct samsung_pinctrl_of_match_data exynos8895_of_data;

extern const struct samsung_pinctrl_of_match_data exynos9810_of_data;

extern const struct samsung_pinctrl_of_match_data exynos990_of_data;

extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data;

extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data;