Commit 6d4e52f8 authored by Michael Ellerman's avatar Michael Ellerman
Browse files

Merge branch 'topic/ppc-kvm' into next 

Merge our KVM topic branch.
parents 7b090b6f b52e8cd3

Documentation/virt/kvm/api.rst

+4 −4
Original line number Diff line number Diff line
@@ -4300,7 +4300,7 @@ operating system that uses the PIT for timing (e.g. Linux 2.4.x). 
4.100 KVM_PPC_CONFIGURE_V3_MMU

------------------------------



:Capability: KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3

:Capability: KVM_CAP_PPC_MMU_RADIX or KVM_CAP_PPC_MMU_HASH_V3

:Architectures: ppc

:Type: vm ioctl

:Parameters: struct kvm_ppc_mmuv3_cfg (in)
@@ -4334,7 +4334,7 @@ the Power ISA V3.00, Book III section 5.7.6.1. 
4.101 KVM_PPC_GET_RMMU_INFO

---------------------------



:Capability: KVM_CAP_PPC_RADIX_MMU

:Capability: KVM_CAP_PPC_MMU_RADIX

:Architectures: ppc

:Type: vm ioctl

:Parameters: struct kvm_ppc_rmmu_info (out)
@@ -8095,7 +8095,7 @@ capability via KVM_ENABLE_CAP ioctl on the vcpu fd. Note that this 
will disable the use of APIC hardware virtualization even if supported

by the CPU, as it's incompatible with SynIC auto-EOI behavior.



8.3 KVM_CAP_PPC_RADIX_MMU

8.3 KVM_CAP_PPC_MMU_RADIX

-------------------------



:Architectures: ppc
@@ -8105,7 +8105,7 @@ available, means that the kernel can support guests using the 
radix MMU defined in Power ISA V3.00 (as implemented in the POWER9

processor).



8.4 KVM_CAP_PPC_HASH_MMU_V3

8.4 KVM_CAP_PPC_MMU_HASH_V3

---------------------------



:Architectures: ppc

arch/powerpc/kvm/book3s.c

+0 −4
Original line number Diff line number Diff line
@@ -360,10 +360,6 @@ static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 
		break;

	}



#if 0

	printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);

#endif



	if (deliver)

		kvmppc_inject_interrupt(vcpu, vec, 0);

arch/powerpc/kvm/book3s_hv.c

+1 −1
Original line number Diff line number Diff line
@@ -4857,7 +4857,7 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 
	 * entering a nested guest in which case the decrementer is now owned

	 * by L2 and the L1 decrementer is provided in hdec_expires

	 */

	if (!kvmhv_is_nestedv2() && kvmppc_core_pending_dec(vcpu) &&

	if (kvmppc_core_pending_dec(vcpu) &&

			((tb < kvmppc_dec_expires_host_tb(vcpu)) ||

			 (trap == BOOK3S_INTERRUPT_SYSCALL &&

			  kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED)))

arch/powerpc/kvm/book3s_hv_nestedv2.c

+2 −2
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ gs_msg_ops_kvmhv_nestedv2_config_fill_info(struct kvmppc_gs_buff *gsb, 
	}



	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_RUN_OUTPUT)) {

		kvmppc_gse_put_buff_info(gsb, KVMPPC_GSID_RUN_OUTPUT,

		rc = kvmppc_gse_put_buff_info(gsb, KVMPPC_GSID_RUN_OUTPUT,

					      cfg->vcpu_run_output_cfg);

		if (rc < 0)

			return rc;

include/uapi/linux/kvm.h

+2 −2
Original line number Diff line number Diff line
@@ -1221,9 +1221,9 @@ struct kvm_vfio_spapr_tce { 
/* Available with KVM_CAP_SPAPR_RESIZE_HPT */

#define KVM_PPC_RESIZE_HPT_PREPARE _IOR(KVMIO, 0xad, struct kvm_ppc_resize_hpt)

#define KVM_PPC_RESIZE_HPT_COMMIT  _IOR(KVMIO, 0xae, struct kvm_ppc_resize_hpt)

/* Available with KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3 */

/* Available with KVM_CAP_PPC_MMU_RADIX or KVM_CAP_PPC_MMU_HASH_V3 */

#define KVM_PPC_CONFIGURE_V3_MMU  _IOW(KVMIO,  0xaf, struct kvm_ppc_mmuv3_cfg)

/* Available with KVM_CAP_PPC_RADIX_MMU */

/* Available with KVM_CAP_PPC_MMU_RADIX */

#define KVM_PPC_GET_RMMU_INFO	  _IOW(KVMIO,  0xb0, struct kvm_ppc_rmmu_info)

/* Available with KVM_CAP_PPC_GET_CPU_CHAR */

#define KVM_PPC_GET_CPU_CHAR	  _IOR(KVMIO,  0xb1, struct kvm_ppc_cpu_char)