Commit 6d627a29 authored by Amit Cohen's avatar Amit Cohen Committed by Jakub Kicinski
Browse files

mlxsw: Trap ARP packets at layer 2 instead of layer 3 



Next patch will set the same hardware domain for all bridge ports,
including VXLAN, to prevent packets from being forwarded by software when
they were already forwarded by hardware.

ARP packets are not flooded by hardware to VXLAN, so software should handle
such flooding. When hardware domain of VXLAN device will be changed, ARP
packets which are trapped and marked with offload_fwd_mark will not be
flooded to VXLAN also in software, which will break VXLAN traffic.

To prevent such breaking, trap ARP packets at layer 2 and don't mark them
as L2-forwarded in hardware, then flooding ARP packets will be done only
in software, and VXLAN will send ARP packets.

Remove NVE_ENCAP_ARP which is no longer needed, as now ARP packets are
trapped when they enter the device.

Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
Reviewed-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarPetr Machata <petrm@nvidia.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Link: https://patch.msgid.link/b2a2cc607a1f4cb96c10bd3b0b0244ba3117fd2e.1742224300.git.petrm@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent c353e898

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+0 −2
Original line number Diff line number Diff line
@@ -2409,8 +2409,6 @@ static const struct mlxsw_listener mlxsw_sp_listener[] = { 
	/* Multicast Router Traps */

	MLXSW_SP_RXL_MARK(ACL1, TRAP_TO_CPU, MULTICAST, false),

	MLXSW_SP_RXL_L3_MARK(ACL2, TRAP_TO_CPU, MULTICAST, false),

	/* NVE traps */

	MLXSW_SP_RXL_MARK(NVE_ENCAP_ARP, TRAP_TO_CPU, NEIGH_DISCOVERY, false),

};



static const struct mlxsw_listener mlxsw_sp1_listener[] = {

drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c

+6 −6
Original line number Diff line number Diff line
@@ -959,17 +959,17 @@ static const struct mlxsw_sp_trap_item mlxsw_sp_trap_items_arr[] = { 
	},

	{

		.trap = MLXSW_SP_TRAP_CONTROL(ARP_REQUEST, NEIGH_DISCOVERY,

					      MIRROR),

					      TRAP),

		.listeners_arr = {

			MLXSW_SP_RXL_MARK(ROUTER_ARPBC, NEIGH_DISCOVERY,

			MLXSW_SP_RXL_NO_MARK(ARPBC, NEIGH_DISCOVERY,

					     TRAP_TO_CPU, false),

		},

	},

	{

		.trap = MLXSW_SP_TRAP_CONTROL(ARP_RESPONSE, NEIGH_DISCOVERY,

					      MIRROR),

					      TRAP),

		.listeners_arr = {

			MLXSW_SP_RXL_MARK(ROUTER_ARPUC, NEIGH_DISCOVERY,

			MLXSW_SP_RXL_NO_MARK(ARPUC, NEIGH_DISCOVERY,

					     TRAP_TO_CPU, false),

		},

	},

drivers/net/ethernet/mellanox/mlxsw/trap.h

+2 −3
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ enum { 
	MLXSW_TRAP_ID_FDB_MISMATCH = 0x3B,

	MLXSW_TRAP_ID_FID_MISS = 0x3D,

	MLXSW_TRAP_ID_DECAP_ECN0 = 0x40,

	MLXSW_TRAP_ID_ARPBC = 0x50,

	MLXSW_TRAP_ID_ARPUC = 0x51,

	MLXSW_TRAP_ID_MTUERROR = 0x52,

	MLXSW_TRAP_ID_TTLERROR = 0x53,

	MLXSW_TRAP_ID_LBERROR = 0x54,
@@ -66,13 +68,10 @@ enum { 
	MLXSW_TRAP_ID_HOST_MISS_IPV6 = 0x92,

	MLXSW_TRAP_ID_IPIP_DECAP_ERROR = 0xB1,

	MLXSW_TRAP_ID_NVE_DECAP_ARP = 0xB8,

	MLXSW_TRAP_ID_NVE_ENCAP_ARP = 0xBD,

	MLXSW_TRAP_ID_IPV4_BFD = 0xD0,

	MLXSW_TRAP_ID_IPV6_BFD = 0xD1,

	MLXSW_TRAP_ID_ROUTER_ALERT_IPV4 = 0xD6,

	MLXSW_TRAP_ID_ROUTER_ALERT_IPV6 = 0xD7,

	MLXSW_TRAP_ID_ROUTER_ARPBC = 0xE0,

	MLXSW_TRAP_ID_ROUTER_ARPUC = 0xE1,

	MLXSW_TRAP_ID_DISCARD_NON_ROUTABLE = 0x11A,

	MLXSW_TRAP_ID_DISCARD_ROUTER2 = 0x130,

	MLXSW_TRAP_ID_DISCARD_ROUTER3 = 0x131,