Loading .mailmap +6 −2 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ Alan Cox <alan@lxorguk.ukuu.org.uk> Alan Cox <root@hraefn.swansea.linux.org.uk> Aleksandar Markovic <aleksandar.markovic@mips.com> <aleksandar.markovic@imgtec.com> Aleksey Gorelov <aleksey_gorelov@phoenix.com> Alex Williamson <alex@shazbot.org> <alex.williamson@redhat.com> Alexander Lobakin <alobakin@pm.me> <alobakin@dlink.ru> Alexander Lobakin <alobakin@pm.me> <alobakin@marvell.com> Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru> Loading Loading @@ -206,6 +207,7 @@ Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com> David Brownell <david-b@pacbell.net> David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org> David Heidelberg <david@ixit.cz> <d.okias@gmail.com> David Hildenbrand <david@kernel.org> <david@redhat.com> David Rheinsberg <david@readahead.eu> <dh.herrmann@gmail.com> David Rheinsberg <david@readahead.eu> <dh.herrmann@googlemail.com> David Rheinsberg <david@readahead.eu> <david.rheinsberg@gmail.com> Loading Loading @@ -426,7 +428,7 @@ Kenneth W Chen <kenneth.w.chen@intel.com> Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org> Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org> Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com> Kirill A. Shutemov <kas@kernel.org> <kirill.shutemov@linux.intel.com> Kiryl Shutsemau <kas@kernel.org> <kirill.shutemov@linux.intel.com> Kishon Vijay Abraham I <kishon@kernel.org> <kishon@ti.com> Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@linaro.org> Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@somainline.org> Loading Loading @@ -605,7 +607,8 @@ Oleksij Rempel <o.rempel@pengutronix.de> Oleksij Rempel <o.rempel@pengutronix.de> <ore@pengutronix.de> Oliver Hartkopp <socketcan@hartkopp.net> <oliver.hartkopp@volkswagen.de> Oliver Hartkopp <socketcan@hartkopp.net> <oliver@hartkopp.net> Oliver Upton <oliver.upton@linux.dev> <oupton@google.com> Oliver Upton <oupton@kernel.org> <oupton@google.com> Oliver Upton <oupton@kernel.org> <oliver.upton@linux.dev> Ondřej Jirman <megi@xff.cz> <megous@megous.com> Oza Pawandeep <quic_poza@quicinc.com> <poza@codeaurora.org> Pali Rohár <pali@kernel.org> <pali.rohar@gmail.com> Loading Loading @@ -644,6 +647,7 @@ Qais Yousef <qyousef@layalina.io> <qais.yousef@arm.com> Quentin Monnet <qmo@kernel.org> <quentin.monnet@netronome.com> Quentin Monnet <qmo@kernel.org> <quentin@isovalent.com> Quentin Perret <qperret@qperret.net> <quentin.perret@arm.com> Rae Moar <raemoar63@gmail.com> <rmoar@google.com> Rafael J. Wysocki <rjw@rjwysocki.net> <rjw@sisk.pl> Rajeev Nandan <quic_rajeevny@quicinc.com> <rajeevny@codeaurora.org> Rajendra Nayak <quic_rjendra@quicinc.com> <rnayak@codeaurora.org> Loading CREDITS +4 −0 Original line number Diff line number Diff line Loading @@ -2036,6 +2036,10 @@ S: Botanicka' 68a S: 602 00 Brno S: Czech Republic N: Karsten Keil E: isdn@linux-pingi.de D: ISDN subsystem maintainer N: Jakob Kemi E: jakob.kemi@telia.com D: V4L W9966 Webcam driver Loading Documentation/ABI/stable/sysfs-driver-qaic 0 → 100644 +19 −0 Original line number Diff line number Diff line What: /sys/bus/pci/drivers/qaic/XXXX:XX:XX.X/accel/accel<minor_nr>/dbc<N>_state Date: October 2025 KernelVersion: 6.19 Contact: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Description: Represents the current state of DMA Bridge channel (DBC). Below are the possible states: =================== ========================================================== IDLE (0) DBC is free and can be activated ASSIGNED (1) DBC is activated and a workload is running on device BEFORE_SHUTDOWN (2) Sub-system associated with this workload has crashed and it will shutdown soon AFTER_SHUTDOWN (3) Sub-system associated with this workload has crashed and it has shutdown BEFORE_POWER_UP (4) Sub-system associated with this workload is shutdown and it will be powered up soon AFTER_POWER_UP (5) Sub-system associated with this workload is now powered up =================== ========================================================== Users: Any userspace application or clients interested in DBC state. Documentation/ABI/testing/sysfs-driver-intel-xe-sriov 0 → 100644 +159 −0 Original line number Diff line number Diff line What: /sys/bus/pci/drivers/xe/.../sriov_admin/ Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: This directory appears for the particular Intel Xe device when: - device supports SR-IOV, and - device is a Physical Function (PF), and - driver support for the SR-IOV PF is enabled on given device. This directory is used as a root for all attributes required to manage both Physical Function (PF) and Virtual Functions (VFs). What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/ Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: This directory holds attributes related to the SR-IOV Physical Function (PF). What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf1/ What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf2/ What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<N>/ Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These directories hold attributes related to the SR-IOV Virtual Functions (VFs). Note that the VF number <N> is 1-based as described in PCI SR-IOV specification as the Xe driver follows that naming schema. There could be "vf1", "vf2" and so on, up to "vf<N>", where <N> matches the value of the "sriov_totalvfs" attribute. What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/profile/exec_quantum_ms What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/profile/preempt_timeout_us What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/profile/sched_priority What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/profile/exec_quantum_ms What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/profile/preempt_timeout_us What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/profile/sched_priority Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These files expose scheduling parameters for the PF and its VFs, and are visible only on Intel Xe platforms that use time-sliced GPU sharing. They can be changed even if VFs are enabled and running and reflect the settings of all tiles/GTs assigned to the given function. exec_quantum_ms: (RW) unsigned integer The GT execution quantum (EQ) in [ms] for the given function. Actual quantum value might be aligned per HW/FW requirements. Default is 0 (unlimited). preempt_timeout_us: (RW) unsigned integer The GT preemption timeout in [us] of the given function. Actual timeout value might be aligned per HW/FW requirements. Default is 0 (unlimited). sched_priority: (RW/RO) string The GT scheduling priority of the given function. "low" - function will be scheduled on the GPU for its EQ/PT only if function has any work already submitted. "normal" - functions will be scheduled on the GPU for its EQ/PT irrespective of whether it has submitted a work or not. "high" - function will be scheduled on the GPU for its EQ/PT in the next time-slice after the current one completes and function has a work submitted. Default is "low". When read, this file will display the current and available scheduling priorities. The currently active priority level will be enclosed in square brackets, like: [low] normal high This file can be read-only if changing the priority is not supported. Writes to these attributes may fail with errors like: -EINVAL if provided input is malformed or not recognized, -EPERM if change is not applicable on given HW/FW, -EIO if FW refuses to change the provisioning. Reads from these attributes may fail with: -EUCLEAN if value is not consistent across all tiles/GTs. What: /sys/bus/pci/drivers/xe/.../sriov_admin/.bulk_profile/exec_quantum_ms What: /sys/bus/pci/drivers/xe/.../sriov_admin/.bulk_profile/preempt_timeout_us What: /sys/bus/pci/drivers/xe/.../sriov_admin/.bulk_profile/sched_priority Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These files allows bulk reconfiguration of the scheduling parameters of the PF or VFs and are available only for Intel Xe platforms with GPU sharing based on the time-slice basis. These scheduling parameters can be changed even if VFs are enabled and running. exec_quantum_ms: (WO) unsigned integer The GT execution quantum (EQ) in [ms] to be applied to all functions. See sriov_admin/{pf,vf<N>}/profile/exec_quantum_ms for more details. preempt_timeout_us: (WO) unsigned integer The GT preemption timeout (PT) in [us] to be applied to all functions. See sriov_admin/{pf,vf<N>}/profile/preempt_timeout_us for more details. sched_priority: (RW/RO) string The GT scheduling priority to be applied for all functions. See sriov_admin/{pf,vf<N>}/profile/sched_priority for more details. Writes to these attributes may fail with errors like: -EINVAL if provided input is malformed or not recognized, -EPERM if change is not applicable on given HW/FW, -EIO if FW refuses to change the provisioning. What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/stop Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: This file allows to control scheduling of the VF on the Intel Xe GPU platforms. It allows to implement custom policy mechanism in case VFs are misbehaving or triggering adverse events above defined thresholds. stop: (WO) bool All GT executions of given function shall be immediately stopped. To allow scheduling this VF again, the VF FLR must be triggered. Writes to this attribute may fail with errors like: -EINVAL if provided input is malformed or not recognized, -EPERM if change is not applicable on given HW/FW, -EIO if FW refuses to change the scheduling. What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/device What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/device Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These are symlinks to the underlying PCI device entry representing given Xe SR-IOV function. For the PF, this link is always present. For VFs, this link is present only for currently enabled VFs. Documentation/accel/qaic/aic100.rst +23 −2 Original line number Diff line number Diff line Loading @@ -487,8 +487,8 @@ one user crashes, the fallout of that should be limited to that workload and not impact other workloads. SSR accomplishes this. If a particular workload crashes, QSM notifies the host via the QAIC_SSR MHI channel. This notification identifies the workload by it's assigned DBC. A multi-stage recovery process is then used to cleanup both sides, and get the channel. This notification identifies the workload by its assigned DBC. A multi-stage recovery process is then used to cleanup both sides, and gets the DBC/NSPs into a working state. When SSR occurs, any state in the workload is lost. Any inputs that were in Loading @@ -496,6 +496,27 @@ process, or queued by not yet serviced, are lost. The loaded artifacts will remain in on-card DDR, but the host will need to re-activate the workload if it desires to recover the workload. When SSR occurs for a specific NSP, the assigned DBC goes through the following state transactions in order: DBC_STATE_BEFORE_SHUTDOWN Indicates that the affected NSP was found in an unrecoverable error condition. DBC_STATE_AFTER_SHUTDOWN Indicates that the NSP is under reset. DBC_STATE_BEFORE_POWER_UP Indicates that the NSP's debug information has been collected, and is ready to be collected by the host (if desired). At that stage the NSP is restarted by QSM. DBC_STATE_AFTER_POWER_UP Indicates that the NSP has been restarted, fully operational and is in idle state. SSR also has an optional crashdump collection feature. If enabled, the host can collect the memory dump for the crashed NSP and dump it to the user space via the dev_coredump subsystem. The host can also decline the crashdump collection request from the device. Reliability, Accessibility, Serviceability (RAS) ================================================ Loading Loading
.mailmap +6 −2 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ Alan Cox <alan@lxorguk.ukuu.org.uk> Alan Cox <root@hraefn.swansea.linux.org.uk> Aleksandar Markovic <aleksandar.markovic@mips.com> <aleksandar.markovic@imgtec.com> Aleksey Gorelov <aleksey_gorelov@phoenix.com> Alex Williamson <alex@shazbot.org> <alex.williamson@redhat.com> Alexander Lobakin <alobakin@pm.me> <alobakin@dlink.ru> Alexander Lobakin <alobakin@pm.me> <alobakin@marvell.com> Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru> Loading Loading @@ -206,6 +207,7 @@ Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com> David Brownell <david-b@pacbell.net> David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org> David Heidelberg <david@ixit.cz> <d.okias@gmail.com> David Hildenbrand <david@kernel.org> <david@redhat.com> David Rheinsberg <david@readahead.eu> <dh.herrmann@gmail.com> David Rheinsberg <david@readahead.eu> <dh.herrmann@googlemail.com> David Rheinsberg <david@readahead.eu> <david.rheinsberg@gmail.com> Loading Loading @@ -426,7 +428,7 @@ Kenneth W Chen <kenneth.w.chen@intel.com> Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org> Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org> Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com> Kirill A. Shutemov <kas@kernel.org> <kirill.shutemov@linux.intel.com> Kiryl Shutsemau <kas@kernel.org> <kirill.shutemov@linux.intel.com> Kishon Vijay Abraham I <kishon@kernel.org> <kishon@ti.com> Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@linaro.org> Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@somainline.org> Loading Loading @@ -605,7 +607,8 @@ Oleksij Rempel <o.rempel@pengutronix.de> Oleksij Rempel <o.rempel@pengutronix.de> <ore@pengutronix.de> Oliver Hartkopp <socketcan@hartkopp.net> <oliver.hartkopp@volkswagen.de> Oliver Hartkopp <socketcan@hartkopp.net> <oliver@hartkopp.net> Oliver Upton <oliver.upton@linux.dev> <oupton@google.com> Oliver Upton <oupton@kernel.org> <oupton@google.com> Oliver Upton <oupton@kernel.org> <oliver.upton@linux.dev> Ondřej Jirman <megi@xff.cz> <megous@megous.com> Oza Pawandeep <quic_poza@quicinc.com> <poza@codeaurora.org> Pali Rohár <pali@kernel.org> <pali.rohar@gmail.com> Loading Loading @@ -644,6 +647,7 @@ Qais Yousef <qyousef@layalina.io> <qais.yousef@arm.com> Quentin Monnet <qmo@kernel.org> <quentin.monnet@netronome.com> Quentin Monnet <qmo@kernel.org> <quentin@isovalent.com> Quentin Perret <qperret@qperret.net> <quentin.perret@arm.com> Rae Moar <raemoar63@gmail.com> <rmoar@google.com> Rafael J. Wysocki <rjw@rjwysocki.net> <rjw@sisk.pl> Rajeev Nandan <quic_rajeevny@quicinc.com> <rajeevny@codeaurora.org> Rajendra Nayak <quic_rjendra@quicinc.com> <rnayak@codeaurora.org> Loading
CREDITS +4 −0 Original line number Diff line number Diff line Loading @@ -2036,6 +2036,10 @@ S: Botanicka' 68a S: 602 00 Brno S: Czech Republic N: Karsten Keil E: isdn@linux-pingi.de D: ISDN subsystem maintainer N: Jakob Kemi E: jakob.kemi@telia.com D: V4L W9966 Webcam driver Loading
Documentation/ABI/stable/sysfs-driver-qaic 0 → 100644 +19 −0 Original line number Diff line number Diff line What: /sys/bus/pci/drivers/qaic/XXXX:XX:XX.X/accel/accel<minor_nr>/dbc<N>_state Date: October 2025 KernelVersion: 6.19 Contact: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Description: Represents the current state of DMA Bridge channel (DBC). Below are the possible states: =================== ========================================================== IDLE (0) DBC is free and can be activated ASSIGNED (1) DBC is activated and a workload is running on device BEFORE_SHUTDOWN (2) Sub-system associated with this workload has crashed and it will shutdown soon AFTER_SHUTDOWN (3) Sub-system associated with this workload has crashed and it has shutdown BEFORE_POWER_UP (4) Sub-system associated with this workload is shutdown and it will be powered up soon AFTER_POWER_UP (5) Sub-system associated with this workload is now powered up =================== ========================================================== Users: Any userspace application or clients interested in DBC state.
Documentation/ABI/testing/sysfs-driver-intel-xe-sriov 0 → 100644 +159 −0 Original line number Diff line number Diff line What: /sys/bus/pci/drivers/xe/.../sriov_admin/ Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: This directory appears for the particular Intel Xe device when: - device supports SR-IOV, and - device is a Physical Function (PF), and - driver support for the SR-IOV PF is enabled on given device. This directory is used as a root for all attributes required to manage both Physical Function (PF) and Virtual Functions (VFs). What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/ Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: This directory holds attributes related to the SR-IOV Physical Function (PF). What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf1/ What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf2/ What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<N>/ Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These directories hold attributes related to the SR-IOV Virtual Functions (VFs). Note that the VF number <N> is 1-based as described in PCI SR-IOV specification as the Xe driver follows that naming schema. There could be "vf1", "vf2" and so on, up to "vf<N>", where <N> matches the value of the "sriov_totalvfs" attribute. What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/profile/exec_quantum_ms What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/profile/preempt_timeout_us What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/profile/sched_priority What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/profile/exec_quantum_ms What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/profile/preempt_timeout_us What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/profile/sched_priority Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These files expose scheduling parameters for the PF and its VFs, and are visible only on Intel Xe platforms that use time-sliced GPU sharing. They can be changed even if VFs are enabled and running and reflect the settings of all tiles/GTs assigned to the given function. exec_quantum_ms: (RW) unsigned integer The GT execution quantum (EQ) in [ms] for the given function. Actual quantum value might be aligned per HW/FW requirements. Default is 0 (unlimited). preempt_timeout_us: (RW) unsigned integer The GT preemption timeout in [us] of the given function. Actual timeout value might be aligned per HW/FW requirements. Default is 0 (unlimited). sched_priority: (RW/RO) string The GT scheduling priority of the given function. "low" - function will be scheduled on the GPU for its EQ/PT only if function has any work already submitted. "normal" - functions will be scheduled on the GPU for its EQ/PT irrespective of whether it has submitted a work or not. "high" - function will be scheduled on the GPU for its EQ/PT in the next time-slice after the current one completes and function has a work submitted. Default is "low". When read, this file will display the current and available scheduling priorities. The currently active priority level will be enclosed in square brackets, like: [low] normal high This file can be read-only if changing the priority is not supported. Writes to these attributes may fail with errors like: -EINVAL if provided input is malformed or not recognized, -EPERM if change is not applicable on given HW/FW, -EIO if FW refuses to change the provisioning. Reads from these attributes may fail with: -EUCLEAN if value is not consistent across all tiles/GTs. What: /sys/bus/pci/drivers/xe/.../sriov_admin/.bulk_profile/exec_quantum_ms What: /sys/bus/pci/drivers/xe/.../sriov_admin/.bulk_profile/preempt_timeout_us What: /sys/bus/pci/drivers/xe/.../sriov_admin/.bulk_profile/sched_priority Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These files allows bulk reconfiguration of the scheduling parameters of the PF or VFs and are available only for Intel Xe platforms with GPU sharing based on the time-slice basis. These scheduling parameters can be changed even if VFs are enabled and running. exec_quantum_ms: (WO) unsigned integer The GT execution quantum (EQ) in [ms] to be applied to all functions. See sriov_admin/{pf,vf<N>}/profile/exec_quantum_ms for more details. preempt_timeout_us: (WO) unsigned integer The GT preemption timeout (PT) in [us] to be applied to all functions. See sriov_admin/{pf,vf<N>}/profile/preempt_timeout_us for more details. sched_priority: (RW/RO) string The GT scheduling priority to be applied for all functions. See sriov_admin/{pf,vf<N>}/profile/sched_priority for more details. Writes to these attributes may fail with errors like: -EINVAL if provided input is malformed or not recognized, -EPERM if change is not applicable on given HW/FW, -EIO if FW refuses to change the provisioning. What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/stop Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: This file allows to control scheduling of the VF on the Intel Xe GPU platforms. It allows to implement custom policy mechanism in case VFs are misbehaving or triggering adverse events above defined thresholds. stop: (WO) bool All GT executions of given function shall be immediately stopped. To allow scheduling this VF again, the VF FLR must be triggered. Writes to this attribute may fail with errors like: -EINVAL if provided input is malformed or not recognized, -EPERM if change is not applicable on given HW/FW, -EIO if FW refuses to change the scheduling. What: /sys/bus/pci/drivers/xe/.../sriov_admin/pf/device What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/device Date: October 2025 KernelVersion: 6.19 Contact: intel-xe@lists.freedesktop.org Description: These are symlinks to the underlying PCI device entry representing given Xe SR-IOV function. For the PF, this link is always present. For VFs, this link is present only for currently enabled VFs.
Documentation/accel/qaic/aic100.rst +23 −2 Original line number Diff line number Diff line Loading @@ -487,8 +487,8 @@ one user crashes, the fallout of that should be limited to that workload and not impact other workloads. SSR accomplishes this. If a particular workload crashes, QSM notifies the host via the QAIC_SSR MHI channel. This notification identifies the workload by it's assigned DBC. A multi-stage recovery process is then used to cleanup both sides, and get the channel. This notification identifies the workload by its assigned DBC. A multi-stage recovery process is then used to cleanup both sides, and gets the DBC/NSPs into a working state. When SSR occurs, any state in the workload is lost. Any inputs that were in Loading @@ -496,6 +496,27 @@ process, or queued by not yet serviced, are lost. The loaded artifacts will remain in on-card DDR, but the host will need to re-activate the workload if it desires to recover the workload. When SSR occurs for a specific NSP, the assigned DBC goes through the following state transactions in order: DBC_STATE_BEFORE_SHUTDOWN Indicates that the affected NSP was found in an unrecoverable error condition. DBC_STATE_AFTER_SHUTDOWN Indicates that the NSP is under reset. DBC_STATE_BEFORE_POWER_UP Indicates that the NSP's debug information has been collected, and is ready to be collected by the host (if desired). At that stage the NSP is restarted by QSM. DBC_STATE_AFTER_POWER_UP Indicates that the NSP has been restarted, fully operational and is in idle state. SSR also has an optional crashdump collection feature. If enabled, the host can collect the memory dump for the crashed NSP and dump it to the user space via the dev_coredump subsystem. The host can also decline the crashdump collection request from the device. Reliability, Accessibility, Serviceability (RAS) ================================================ Loading