Commit 6d8fb3cb authored by Fuad Tabba's avatar Fuad Tabba Committed by Marc Zyngier
Browse files

KVM: arm64: Abstract set/clear of CPTR_EL2 bits behind helper 



The same traps controlled by CPTR_EL2 or CPACR_EL1 need to be
toggled in different parts of the code, but the exact bits and
their polarity differ between these two formats and the mode
(vhe/nvhe/hvhe).

To reduce the amount of duplicated code and the chance of getting
the wrong bit/polarity or missing a field, abstract the set/clear
of CPTR_EL2 bits behind a helper.

Since (h)VHE is the way of the future, use the CPACR_EL1 format,
which is a subset of the VHE CPTR_EL2, as a reference.

No functional change intended.

Suggested-by: default avatarOliver Upton <oliver.upton@linux.dev>
Reviewed-by: default avatarOliver Upton <oliver.upton@linux.dev>
Signed-off-by: default avatarFuad Tabba <tabba@google.com>
Link: https://lore.kernel.org/r/20240603122852.3923848-4-tabba@google.com


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 45f4ea9b

arch/arm64/include/asm/kvm_arm.h

+6 −0
Original line number Diff line number Diff line
@@ -305,6 +305,12 @@ 
				 GENMASK(19, 14) |	\

				 BIT(11))



#define CPTR_VHE_EL2_RES0	(GENMASK(63, 32) |	\

				 GENMASK(27, 26) |	\

				 GENMASK(23, 22) |	\

				 GENMASK(19, 18) |	\

				 GENMASK(15, 0))



/* Hyp Debug Configuration Register bits */

#define MDCR_EL2_E2TB_MASK	(UL(0x3))

#define MDCR_EL2_E2TB_SHIFT	(UL(24))

arch/arm64/include/asm/kvm_emulate.h

+62 −0
Original line number Diff line number Diff line
@@ -557,6 +557,68 @@ static __always_inline void kvm_incr_pc(struct kvm_vcpu *vcpu) 
		vcpu_set_flag((v), e);					\

	} while (0)



#define __build_check_all_or_none(r, bits)				\

	BUILD_BUG_ON(((r) & (bits)) && ((r) & (bits)) != (bits))



#define __cpacr_to_cptr_clr(clr, set)					\

	({								\

		u64 cptr = 0;						\

									\

		if ((set) & CPACR_ELx_FPEN)				\

			cptr |= CPTR_EL2_TFP;				\

		if ((set) & CPACR_ELx_ZEN)				\

			cptr |= CPTR_EL2_TZ;				\

		if ((set) & CPACR_ELx_SMEN)				\

			cptr |= CPTR_EL2_TSM;				\

		if ((clr) & CPACR_ELx_TTA)				\

			cptr |= CPTR_EL2_TTA;				\

		if ((clr) & CPTR_EL2_TAM)				\

			cptr |= CPTR_EL2_TAM;				\

		if ((clr) & CPTR_EL2_TCPAC)				\

			cptr |= CPTR_EL2_TCPAC;				\

									\

		cptr;							\

	})



#define __cpacr_to_cptr_set(clr, set)					\

	({								\

		u64 cptr = 0;						\

									\

		if ((clr) & CPACR_ELx_FPEN)				\

			cptr |= CPTR_EL2_TFP;				\

		if ((clr) & CPACR_ELx_ZEN)				\

			cptr |= CPTR_EL2_TZ;				\

		if ((clr) & CPACR_ELx_SMEN)				\

			cptr |= CPTR_EL2_TSM;				\

		if ((set) & CPACR_ELx_TTA)				\

			cptr |= CPTR_EL2_TTA;				\

		if ((set) & CPTR_EL2_TAM)				\

			cptr |= CPTR_EL2_TAM;				\

		if ((set) & CPTR_EL2_TCPAC)				\

			cptr |= CPTR_EL2_TCPAC;				\

									\

		cptr;							\

	})



#define cpacr_clear_set(clr, set)					\

	do {								\

		BUILD_BUG_ON((set) & CPTR_VHE_EL2_RES0);		\

		BUILD_BUG_ON((clr) & CPACR_ELx_E0POE);			\

		__build_check_all_or_none((clr), CPACR_ELx_FPEN);	\

		__build_check_all_or_none((set), CPACR_ELx_FPEN);	\

		__build_check_all_or_none((clr), CPACR_ELx_ZEN);	\

		__build_check_all_or_none((set), CPACR_ELx_ZEN);	\

		__build_check_all_or_none((clr), CPACR_ELx_SMEN);	\

		__build_check_all_or_none((set), CPACR_ELx_SMEN);	\

									\

		if (has_vhe() || has_hvhe())				\

			sysreg_clear_set(cpacr_el1, clr, set);		\

		else							\

			sysreg_clear_set(cptr_el2,			\

					 __cpacr_to_cptr_clr(clr, set),	\

					 __cpacr_to_cptr_set(clr, set));\

	} while (0)



static __always_inline void kvm_write_cptr_el2(u64 val)

{

	if (has_vhe() || has_hvhe())

arch/arm64/kvm/hyp/include/hyp/switch.h

+4 −14
Original line number Diff line number Diff line
@@ -331,7 +331,6 @@ static bool kvm_hyp_handle_fpsimd(struct kvm_vcpu *vcpu, u64 *exit_code) 
{

	bool sve_guest;

	u8 esr_ec;

	u64 reg;



	if (!system_supports_fpsimd())

		return false;
@@ -354,19 +353,10 @@ static bool kvm_hyp_handle_fpsimd(struct kvm_vcpu *vcpu, u64 *exit_code) 
	/* Valid trap.  Switch the context: */



	/* First disable enough traps to allow us to update the registers */

	if (has_vhe() || has_hvhe()) {

		reg = CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN;

	if (sve_guest)

			reg |= CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN;



		sysreg_clear_set(cpacr_el1, 0, reg);

	} else {

		reg = CPTR_EL2_TFP;

		if (sve_guest)

			reg |= CPTR_EL2_TZ;



		sysreg_clear_set(cptr_el2, reg, 0);

	}

		cpacr_clear_set(0, CPACR_ELx_FPEN | CPACR_ELx_ZEN);

	else

		cpacr_clear_set(0, CPACR_ELx_FPEN);

	isb();



	/* Write out the host state if it's in the registers */

arch/arm64/kvm/hyp/nvhe/hyp-main.c

+1 −5
Original line number Diff line number Diff line
@@ -405,11 +405,7 @@ void handle_trap(struct kvm_cpu_context *host_ctxt) 
		handle_host_smc(host_ctxt);

		break;

	case ESR_ELx_EC_SVE:

		if (has_hvhe())

			sysreg_clear_set(cpacr_el1, 0, (CPACR_EL1_ZEN_EL1EN |

							CPACR_EL1_ZEN_EL0EN));

		else

			sysreg_clear_set(cptr_el2, CPTR_EL2_TZ, 0);

		cpacr_clear_set(0, CPACR_ELx_ZEN);

		isb();

		sve_cond_update_zcr_vq(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2);

		break;