Commit 6d9b10fd authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux into arm/drivers 

Reset controller updates for v5.14

This tag adds support for the Microchip Sparx5 Switch Reset controller
and contains some small fixes and cleanups in core and various drivers.

* tag 'reset-for-v5.14' of git://git.pengutronix.de/pza/linux:
  reset: brcmstb: Add missing MODULE_DEVICE_TABLE
  reset: a10sr: add missing of_match_table reference
  reset: RESET_INTEL_GW should depend on X86
  reset: RESET_BRCMSTB_RESCAL should depend on ARCH_BRCMSTB
  reset: uniphier: enclose UNIPHIER_RESET_ID_END value in parentheses
  reset: sti/syscfg: replace comma with semicolon
  reset: ti-syscon: fix to_ti_syscon_reset_data macro
  reset: berlin: replace unsigned with unsigned int
  reset: whitespace fixes
  reset: mchp: sparx5: add switch reset driver
  dt-bindings: reset: microchip sparx5 reset driver bindings
  reset: oxnas: replace file name with short description
  reset: zynqmp: replace spaces with tabs
  reset: bcm6345: Make reset_control_ops const

Link: https://lore.kernel.org/r/418cf3a460cfe1d0f91f87e10baaf478bd41f1d5.camel@pengutronix.de


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents c4681547 e207457f

Documentation/devicetree/bindings/reset/microchip,rst.yaml

0 → 100644
+58 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Microchip Sparx5 Switch Reset Controller



maintainers:

  - Steen Hegelund <steen.hegelund@microchip.com>

  - Lars Povlsen <lars.povlsen@microchip.com>



description: |

  The Microchip Sparx5 Switch provides reset control and implements the following

  functions

    - One Time Switch Core Reset (Soft Reset)



properties:

  $nodename:

    pattern: "^reset-controller@[0-9a-f]+$"



  compatible:

    const: microchip,sparx5-switch-reset



  reg:

    items:

      - description: global control block registers



  reg-names:

    items:

      - const: gcb



  "#reset-cells":

    const: 1



  cpu-syscon:

    $ref: "/schemas/types.yaml#/definitions/phandle"

    description: syscon used to access CPU reset



required:

  - compatible

  - reg

  - reg-names

  - "#reset-cells"

  - cpu-syscon



additionalProperties: false



examples:

  - |

    reset: reset-controller@11010008 {

        compatible = "microchip,sparx5-switch-reset";

        reg = <0x11010008 0x4>;

        reg-names = "gcb";

        #reset-cells = <1>;

        cpu-syscon = <&cpu_ctrl>;

    };

drivers/reset/Kconfig

+11 −1
Original line number Diff line number Diff line
@@ -59,7 +59,8 @@ config RESET_BRCMSTB 
config RESET_BRCMSTB_RESCAL

	bool "Broadcom STB RESCAL reset controller"

	depends on HAS_IOMEM

	default ARCH_BRCMSTB || COMPILE_TEST

	depends on ARCH_BRCMSTB || COMPILE_TEST

	default ARCH_BRCMSTB

	help

	  This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on

	  BCM7216.
@@ -82,6 +83,7 @@ config RESET_IMX7 


config RESET_INTEL_GW

	bool "Intel Reset Controller Driver"

	depends on X86 || COMPILE_TEST

	depends on OF && HAS_IOMEM

	select REGMAP_MMIO

	help
@@ -111,6 +113,14 @@ config RESET_LPC18XX 
	help

	  This enables the reset controller driver for NXP LPC18xx/43xx SoCs.



config RESET_MCHP_SPARX5

	bool "Microchip Sparx5 reset driver"

	depends on HAS_IOMEM || COMPILE_TEST

	default y if SPARX5_SWITCH

	select MFD_SYSCON

	help

	  This driver supports switch core reset for the Microchip Sparx5 SoC.



config RESET_MESON

	tristate "Meson Reset Driver"

	depends on ARCH_MESON || COMPILE_TEST

drivers/reset/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o 
obj-$(CONFIG_RESET_K210) += reset-k210.o

obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o

obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o

obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o

obj-$(CONFIG_RESET_MESON) += reset-meson.o

obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o

obj-$(CONFIG_RESET_NPCM) += reset-npcm.o

drivers/reset/core.c

+10 −10
Original line number Diff line number Diff line
@@ -744,8 +744,8 @@ void reset_control_bulk_release(int num_rstcs, 
}

EXPORT_SYMBOL_GPL(reset_control_bulk_release);



static struct reset_control *__reset_control_get_internal(

				struct reset_controller_dev *rcdev,

static struct reset_control *

__reset_control_get_internal(struct reset_controller_dev *rcdev,

			     unsigned int index, bool shared, bool acquired)

{

	struct reset_control *rstc;
@@ -806,9 +806,9 @@ static void __reset_control_put_internal(struct reset_control *rstc) 
	kref_put(&rstc->refcnt, __reset_control_release);

}



struct reset_control *__of_reset_control_get(struct device_node *node,

				     const char *id, int index, bool shared,

				     bool optional, bool acquired)

struct reset_control *

__of_reset_control_get(struct device_node *node, const char *id, int index,

		       bool shared, bool optional, bool acquired)

{

	struct reset_control *rstc;

	struct reset_controller_dev *r, *rcdev;
@@ -1027,9 +1027,9 @@ static void devm_reset_control_release(struct device *dev, void *res) 
	reset_control_put(*(struct reset_control **)res);

}



struct reset_control *__devm_reset_control_get(struct device *dev,

				     const char *id, int index, bool shared,

				     bool optional, bool acquired)

struct reset_control *

__devm_reset_control_get(struct device *dev, const char *id, int index,

			 bool shared, bool optional, bool acquired)

{

	struct reset_control **ptr, *rstc;

drivers/reset/reset-a10sr.c

+1 −0
Original line number Diff line number Diff line
@@ -118,6 +118,7 @@ static struct platform_driver a10sr_reset_driver = { 
	.probe	= a10sr_reset_probe,

	.driver = {

		.name		= "altr_a10sr_reset",

		.of_match_table	= a10sr_reset_of_match,

	},

};

module_platform_driver(a10sr_reset_driver);