Commit 6daaa479 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-xe-fixes-2025-06-26' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes 



UAPI Changes:
Driver Changes:
- Missing error check (Haoxiang Li)
- Fix xe_hwmon_power_max_write (Karthik)
- Move flushes (Maarten and Matthew Auld)
- Explicitly exit CT safe mode on unwind (Michal)
- Process deferred GGTT node removals on device unwind (Michal)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
Link: https://lore.kernel.org/r/aF1T6EzzC3xj4K4H@fedora
parents b6211ab2 af2b588a

drivers/gpu/drm/xe/display/xe_display.c

+2 −0
Original line number Diff line number Diff line
@@ -104,6 +104,8 @@ int xe_display_create(struct xe_device *xe) 
	spin_lock_init(&xe->display.fb_tracking.lock);



	xe->display.hotplug.dp_wq = alloc_ordered_workqueue("xe-dp", 0);

	if (!xe->display.hotplug.dp_wq)

		return -ENOMEM;



	return drmm_add_action_or_reset(&xe->drm, display_destroy, NULL);

}

drivers/gpu/drm/xe/display/xe_dsb_buffer.c

+4 −7
Original line number Diff line number Diff line
@@ -17,10 +17,7 @@ u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf) 


void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val)

{

	struct xe_device *xe = dsb_buf->vma->bo->tile->xe;



	iosys_map_wr(&dsb_buf->vma->bo->vmap, idx * 4, u32, val);

	xe_device_l2_flush(xe);

}



u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx)
@@ -30,12 +27,9 @@ u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx) 


void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val, size_t size)

{

	struct xe_device *xe = dsb_buf->vma->bo->tile->xe;



	WARN_ON(idx > (dsb_buf->buf_size - size) / sizeof(*dsb_buf->cmd_buf));



	iosys_map_memset(&dsb_buf->vma->bo->vmap, idx * 4, val, size);

	xe_device_l2_flush(xe);

}



bool intel_dsb_buffer_create(struct intel_crtc *crtc, struct intel_dsb_buffer *dsb_buf, size_t size)
@@ -74,9 +68,12 @@ void intel_dsb_buffer_cleanup(struct intel_dsb_buffer *dsb_buf) 


void intel_dsb_buffer_flush_map(struct intel_dsb_buffer *dsb_buf)

{

	struct xe_device *xe = dsb_buf->vma->bo->tile->xe;



	/*

	 * The memory barrier here is to ensure coherency of DSB vs MMIO,

	 * both for weak ordering archs and discrete cards.

	 */

	xe_device_wmb(dsb_buf->vma->bo->tile->xe);

	xe_device_wmb(xe);

	xe_device_l2_flush(xe);

}

drivers/gpu/drm/xe/display/xe_fb_pin.c

+3 −2
Original line number Diff line number Diff line
@@ -164,6 +164,9 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb, 


	vma->dpt = dpt;

	vma->node = dpt->ggtt_node[tile0->id];



	/* Ensure DPT writes are flushed */

	xe_device_l2_flush(xe);

	return 0;

}
@@ -333,8 +336,6 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, 
	if (ret)

		goto err_unpin;



	/* Ensure DPT writes are flushed */

	xe_device_l2_flush(xe);

	return vma;



err_unpin:

drivers/gpu/drm/xe/regs/xe_mchbar_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
#define PCU_CR_PACKAGE_RAPL_LIMIT		XE_REG(MCHBAR_MIRROR_BASE_SNB + 0x59a0)

#define   PWR_LIM_VAL				REG_GENMASK(14, 0)

#define   PWR_LIM_EN				REG_BIT(15)

#define   PWR_LIM				REG_GENMASK(15, 0)

#define   PWR_LIM_TIME				REG_GENMASK(23, 17)

#define   PWR_LIM_TIME_X			REG_GENMASK(23, 22)

#define   PWR_LIM_TIME_Y			REG_GENMASK(21, 17)

drivers/gpu/drm/xe/xe_ggtt.c

+11 −0
Original line number Diff line number Diff line
@@ -201,6 +201,13 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = { 
	.ggtt_set_pte = xe_ggtt_set_pte_and_flush,

};



static void dev_fini_ggtt(void *arg)

{

	struct xe_ggtt *ggtt = arg;



	drain_workqueue(ggtt->wq);

}



/**

 * xe_ggtt_init_early - Early GGTT initialization

 * @ggtt: the &xe_ggtt to be initialized
@@ -257,6 +264,10 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt) 
	if (err)

		return err;



	err = devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt);

	if (err)

		return err;



	if (IS_SRIOV_VF(xe)) {

		err = xe_gt_sriov_vf_prepare_ggtt(xe_tile_get_gt(ggtt->tile, 0));

		if (err)