Commit 6e207b88 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm-soc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC updates from Olof Johansson:
 "A few SoC (code) changes have queued up this cycle, mostly for minor
  changes and some refactoring and cleanup of legacy platforms. This
  branch also contains a few of the fixes that weren't sent in by the
  end of the release (all fairly minor).

   - Adding an additional maintainer for the TEE subsystem (Sumit Garg)

   - Quite a significant modernization of the IXP4xx platforms by Linus
     Walleij, revisiting with a new PCI host driver/binding, removing
     legacy mach/* include dependencies and moving platform
     detection/config to drivers/soc. Also some updates/cleanup of
     platform data.

   - Core power domain support for Tegra platforms, and some
     improvements in build test coverage by adding stubs for compile
     test targets.

   - A handful of updates to i.MX platforms, adding legacy (non-PSCI)
     SMP support on i.MX7D, SoC ID setup for i.MX50, removal of platform
     data and board fixups for iMX6/7.

  ... and a few smaller changes and fixes for Samsung, OMAP, Allwinner,
  Rockchip"

* tag 'arm-soc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (53 commits)
  MAINTAINERS: Add myself as TEE subsystem reviewer
  ixp4xx: fix spelling mistake in Kconfig "Devce" -> "Device"
  hw_random: ixp4xx: Add OF support
  hw_random: ixp4xx: Add DT bindings
  hw_random: ixp4xx: Turn into a module
  hw_random: ixp4xx: Use SPDX license tag
  hw_random: ixp4xx: enable compile-testing
  pata: ixp4xx: split platform data to its own header
  soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h
  PCI: ixp4xx: Add a new driver for IXP4xx
  PCI: ixp4xx: Add device tree bindings for IXP4xx
  ARM/ixp4xx: Make NEED_MACH_IO_H optional
  ARM/ixp4xx: Move the virtual IObases
  MAINTAINERS: ARM/MStar/Sigmastar SoCs: Add a link to the MStar tree
  ARM: debug: add UART early console support for MSTAR SoCs
  ARM: dts: ux500: Fix LED probing
  ARM: imx: add smp support for imx7d
  ARM: imx6q: drop of_platform_default_populate() from init_machine
  arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory
  soc/tegra: fuse: Fix Tegra234-only builds
  ...
parents b6fd9e25 42accadb

Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pci/intel,ixp4xx-pci.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel IXP4xx PCI controller



maintainers:

  - Linus Walleij <linus.walleij@linaro.org>



description: PCI host controller found in the Intel IXP4xx SoC series.



allOf:

  - $ref: /schemas/pci/pci-bus.yaml#



properties:

  compatible:

    items:

      - enum:

          - intel,ixp42x-pci

          - intel,ixp43x-pci

    description: The two supported variants are ixp42x and ixp43x,

      though more variants may exist.



  reg:

    items:

      - description: IXP4xx-specific registers



  interrupts:

    items:

      - description: Main PCI interrupt

      - description: PCI DMA interrupt 1

      - description: PCI DMA interrupt 2



  ranges:

    maxItems: 2

    description: Typically one memory range of 64MB and one IO

      space range of 64KB.



  dma-ranges:

    maxItems: 1

    description: The DMA range tells the PCI host which addresses

      the RAM is at. It can map only 64MB so if the RAM is bigger

      than 64MB the DMA access has to be restricted to these

      addresses.



  "#interrupt-cells": true



  interrupt-map: true



  interrupt-map-mask:

    items:

      - const: 0xf800

      - const: 0

      - const: 0

      - const: 7



required:

  - compatible

  - reg

  - dma-ranges

  - "#interrupt-cells"

  - interrupt-map

  - interrupt-map-mask



unevaluatedProperties: false



examples:

  - |

    pci@c0000000 {

      compatible = "intel,ixp43x-pci";

      reg = <0xc0000000 0x1000>;

      #address-cells = <3>;

      #size-cells = <2>;

      device_type = "pci";

      bus-range = <0x00 0xff>;



      ranges =

        <0x02000000 0 0x48000000 0x48000000 0 0x04000000>,

        <0x01000000 0 0x00000000 0x4c000000 0 0x00010000>;

      dma-ranges =

        <0x02000000 0 0x00000000 0x00000000 0 0x04000000>;



      #interrupt-cells = <1>;

      interrupt-map-mask = <0xf800 0 0 7>;

      interrupt-map =

        <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */

        <0x0800 0 0 2 &gpio0 10 3>, /* INT B on slot 1 is irq 10 */

        <0x0800 0 0 3 &gpio0 9  3>, /* INT C on slot 1 is irq 9 */

        <0x0800 0 0 4 &gpio0 8  3>, /* INT D on slot 1 is irq 8 */

        <0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */

        <0x1000 0 0 2 &gpio0 9  3>, /* INT B on slot 2 is irq 9 */

        <0x1000 0 0 3 &gpio0 8  3>, /* INT C on slot 2 is irq 8 */

        <0x1000 0 0 4 &gpio0 11 3>, /* INT D on slot 2 is irq 11 */

        <0x1800 0 0 1 &gpio0 9  3>, /* INT A on slot 3 is irq 9 */

        <0x1800 0 0 2 &gpio0 8  3>, /* INT B on slot 3 is irq 8 */

        <0x1800 0 0 3 &gpio0 11 3>, /* INT C on slot 3 is irq 11 */

        <0x1800 0 0 4 &gpio0 10 3>; /* INT D on slot 3 is irq 10 */

    };

Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/rng/intel,ixp46x-rng.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel IXP46x RNG bindings



description: |

  The Intel IXP46x has a random number generator at a fixed physical

  location in memory. Each read is guaranteed to provide a unique

  32 bit random number.



maintainers:

  - Linus Walleij <linus.walleij@linaro.org>



properties:

  compatible:

    const: intel,ixp46x-rng



  reg:

    maxItems: 1



required:

  - compatible

  - reg



additionalProperties: false



examples:

  - |

    rng@70002100 {

      compatible = "intel,ixp46x-rng";

      reg = <0x70002100 4>;

    };

MAINTAINERS

+12 −6
Original line number Diff line number Diff line
@@ -2210,6 +2210,7 @@ M: Daniel Palmer <daniel@thingy.jp> 
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

S:	Maintained

W:	http://linux-chenxing.org/

T:	git git://github.com/linux-chenxing/linux.git

F:	Documentation/devicetree/bindings/arm/mstar/*

F:	Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml

F:	Documentation/devicetree/bindings/gpio/mstar,msc313-gpio.yaml
@@ -2479,9 +2480,12 @@ F: drivers/*/*/*s3c24* 
F:	drivers/*/*s3c24*

F:	drivers/*/*s3c64xx*

F:	drivers/*/*s5pv210*

F:	drivers/clocksource/samsung_pwm_timer.c

F:	drivers/memory/samsung/

F:	drivers/pwm/pwm-samsung.c

F:	drivers/soc/samsung/

F:	drivers/tty/serial/samsung*

F:	include/clocksource/samsung_pwm.h

F:	include/linux/platform_data/*s3c*

F:	include/linux/serial_s3c.h

F:	include/linux/soc/samsung/
@@ -9381,6 +9385,7 @@ F: include/linux/soc/ixp4xx/qmgr.h 
INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT

M:	Deepak Saxena <dsaxena@plexity.net>

S:	Maintained

F:	Documentation/devicetree/bindings/display/intel,ixp46x-rng.yaml

F:	drivers/char/hw_random/ixp4xx-rng.c









INTEL KEEM BAY DRM DRIVER








@@ -13510,12 +13515,6 @@ L:	linux-omap@vger.kernel.org







S:	Maintained









F:	arch/arm/mach-omap2/omap_hwmod*data*

















OMAP HWMOD DATA FOR OMAP4-BASED DEVICES









M:	Benoît Cousson <bcousson@baylibre.com>









L:	linux-omap@vger.kernel.org









S:	Maintained









F:	arch/arm/mach-omap2/omap_hwmod_44xx_data.c

















OMAP HWMOD SUPPORT









M:	Benoît Cousson <bcousson@baylibre.com>









M:	Paul Walmsley <paul@pwsan.com>








@@ -14179,6 +14178,12 @@ S:	Maintained







F:	Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml









F:	drivers/pci/controller/dwc/pcie-fu740.c

















PCI DRIVER FOR INTEL IXP4XX









M:	Linus Walleij <linus.walleij@linaro.org>









S:	Maintained









F:	Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml









F:	drivers/pci/controller/pci-ixp4xx.c

















PCI DRIVER FOR INTEL VOLUME MANAGEMENT DEVICE (VMD)









M:	Jonathan Derrick <jonathan.derrick@intel.com>









L:	linux-pci@vger.kernel.org








@@ -18126,6 +18131,7 @@ F:	include/media/i2c/tw9910.h















TEE SUBSYSTEM









M:	Jens Wiklander <jens.wiklander@linaro.org>









R:	Sumit Garg <sumit.garg@linaro.org>









L:	op-tee@lists.trustedfirmware.org









S:	Maintained









F:	Documentation/staging/tee.rst

























arch/arm/Kconfig



+2
−1






























Original line number
Diff line number
Diff line







@@ -394,7 +394,8 @@ config ARCH_IXP4XX







	select HAVE_PCI









	select IXP4XX_IRQ









	select IXP4XX_TIMER









	select NEED_MACH_IO_H









	# With the new PCI driver this is not needed









	select NEED_MACH_IO_H if PCI_IXP4XX_LEGACY









	select USB_EHCI_BIG_ENDIAN_DESC









	select USB_EHCI_BIG_ENDIAN_MMIO









	help
































arch/arm/Kconfig.debug



+13
−2






























Original line number
Diff line number
Diff line







@@ -609,6 +609,14 @@ choice







		  when u-boot hands over to the kernel, the system









		  silently crashes, with no serial output at all.



















	config DEBUG_MSTARV7_PMUART









		bool "Kernel low-level debugging messages via MSTARV7 PM UART"









		depends on ARCH_MSTARV7









		select DEBUG_UART_8250









		help









		  Say Y here if you want kernel low-level debugging support









		  for MSTAR ARMv7-based platforms on PM UART.



















	config DEBUG_MT6589_UART0









		bool "Mediatek mt6589 UART0"









		depends on ARCH_MEDIATEK








@@ -1607,6 +1615,7 @@ config DEBUG_UART_PHYS







	default 0x18000400 if DEBUG_BCM_HR2









	default 0x18023000 if DEBUG_BCM_IPROC_UART3









	default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1









	default 0x1f221000 if DEBUG_MSTARV7_PMUART









	default 0x20001000 if DEBUG_HIP01_UART









	default 0x20060000 if DEBUG_RK29_UART0









	default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2








@@ -1724,6 +1733,7 @@ config DEBUG_UART_VIRT







	default 0xf0100000 if DEBUG_DIGICOLOR_UA0









	default 0xf01fb000 if DEBUG_NOMADIK_UART









	default 0xf0201000 if DEBUG_BCM2835 || DEBUG_BCM2836









	default 0xf0221000 if DEBUG_MSTARV7_PMUART









	default 0xf1000300 if DEBUG_BCM_5301X









	default 0xf1000400 if DEBUG_BCM_HR2









	default 0xf1002000 if DEBUG_MT8127_UART0








@@ -1805,8 +1815,8 @@ config DEBUG_UART_VIRT







	default 0xfedc0000 if DEBUG_EP93XX









	default 0xfee003f8 if DEBUG_FOOTBRIDGE_COM1









	default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART









	default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN









	default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN









	default 0xfec00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN









	default 0xfec00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN









	default 0xfef36000 if DEBUG_HIGHBANK_UART









	default 0xfefb0000 if DEBUG_OMAP1UART1 || DEBUG_OMAP7XXUART1









	default 0xfefb0800 if DEBUG_OMAP1UART2 || DEBUG_OMAP7XXUART2








@@ -1829,6 +1839,7 @@ config DEBUG_UART_8250_SHIFT







	default 0 if DEBUG_FOOTBRIDGE_COM1 || ARCH_IOP32X || DEBUG_BCM_5301X || \









		DEBUG_BCM_HR2 || DEBUG_OMAP7XXUART1 || DEBUG_OMAP7XXUART2 || \









		DEBUG_OMAP7XXUART3









	default 3 if DEBUG_MSTARV7_PMUART









	default 2



















config DEBUG_UART_8250_WORD