Commit 6e4e4e2a authored by Johan Jonker's avatar Johan Jonker Committed by Heiko Stuebner
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ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188



With grf.txt converted to YAML a lot of compatibles
did not have 'simple-mfd' added in the old binding.
That implies that if you have child nodes they need
to be documented.
Make the new layout fit for rk3066/rk3188,
move and restyle the grf nodes.
Remove rockchip,grf from usbphy node.
Add "#phy-cells", because it is a required property
by phy-provider.yaml
With the conversion of syscon.yaml minItems for compatibles
was set to 2. Current Rockchip rk3xxx.dtsi file only uses "syscon"
for the grf registers. Add "syscon", "simple-mfd"
compatible for rk3066/rk3188 to reduce notifications produced with:

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml

Changed compatibles:
"rockchip,rk3066-grf", "syscon", "simple-mfd"
"rockchip,rk3188-grf", "syscon", "simple-mfd"

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 87cf20cc
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+29 −24
Original line number Diff line number Diff line
@@ -266,30 +266,6 @@ tsadc: tsadc@20060000 {
		status = "disabled";
	};

	usbphy: phy {
		compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy";
		rockchip,grf = <&grf>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";

		usbphy0: usb-phy@17c {
			#phy-cells = <0>;
			reg = <0x17c>;
			clocks = <&cru SCLK_OTGPHY0>;
			clock-names = "phyclk";
			#clock-cells = <0>;
		};

		usbphy1: usb-phy@188 {
			#phy-cells = <0>;
			reg = <0x188>;
			clocks = <&cru SCLK_OTGPHY1>;
			clock-names = "phyclk";
			#clock-cells = <0>;
		};
	};

	pinctrl: pinctrl {
		compatible = "rockchip,rk3066a-pinctrl";
		rockchip,grf = <&grf>;
@@ -702,6 +678,35 @@ &gpu {
	power-domains = <&power RK3066_PD_GPU>;
};

&grf {
	compatible = "rockchip,rk3066-grf", "syscon", "simple-mfd";

	usbphy: usbphy {
		compatible = "rockchip,rk3066a-usb-phy",
			     "rockchip,rk3288-usb-phy";
		#phy-cells = <0>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";

		usbphy0: usb-phy@17c {
			reg = <0x17c>;
			clocks = <&cru SCLK_OTGPHY0>;
			clock-names = "phyclk";
			#clock-cells = <0>;
			#phy-cells = <0>;
		};

		usbphy1: usb-phy@188 {
			reg = <0x188>;
			clocks = <&cru SCLK_OTGPHY1>;
			clock-names = "phyclk";
			#clock-cells = <0>;
			#phy-cells = <0>;
		};
	};
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_xfer>;
+29 −24
Original line number Diff line number Diff line
@@ -214,30 +214,6 @@ cpu_leakage: cpu_leakage@17 {
		};
	};

	usbphy: phy {
		compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy";
		rockchip,grf = <&grf>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";

		usbphy0: usb-phy@10c {
			#phy-cells = <0>;
			reg = <0x10c>;
			clocks = <&cru SCLK_OTGPHY0>;
			clock-names = "phyclk";
			#clock-cells = <0>;
		};

		usbphy1: usb-phy@11c {
			#phy-cells = <0>;
			reg = <0x11c>;
			clocks = <&cru SCLK_OTGPHY1>;
			clock-names = "phyclk";
			#clock-cells = <0>;
		};
	};

	pinctrl: pinctrl {
		compatible = "rockchip,rk3188-pinctrl";
		rockchip,grf = <&grf>;
@@ -662,6 +638,35 @@ &gpu {
	power-domains = <&power RK3188_PD_GPU>;
};

&grf{
	compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd";

	usbphy: usbphy {
		compatible = "rockchip,rk3188-usb-phy",
			     "rockchip,rk3288-usb-phy";
		#phy-cells = <0>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";

		usbphy0: usb-phy@10c {
			reg = <0x10c>;
			clocks = <&cru SCLK_OTGPHY0>;
			clock-names = "phyclk";
			#clock-cells = <0>;
			#phy-cells = <0>;
		};

		usbphy1: usb-phy@11c {
			reg = <0x11c>;
			clocks = <&cru SCLK_OTGPHY1>;
			clock-names = "phyclk";
			#clock-cells = <0>;
			#phy-cells = <0>;
		};
	};
};

&i2c0 {
	compatible = "rockchip,rk3188-i2c";
	pinctrl-names = "default";
+1 −1
Original line number Diff line number Diff line
@@ -256,7 +256,7 @@ reboot-mode {
	};

	grf: grf@20008000 {
		compatible = "syscon";
		compatible = "syscon", "simple-mfd";
		reg = <0x20008000 0x200>;
	};