Commit 6ebd9a4f authored by Satya Priya Kakitapalli's avatar Satya Priya Kakitapalli Committed by Bjorn Andersson
Browse files

clk: qcom: gpucc-sm8150: Update the gpu_cc_pll1 config 



Update the test_ctl_hi_val and test_ctl_hi1_val of gpu_cc_pll1
as per latest HW recommendation.

Fixes: 0cef71f2 ("clk: qcom: Add graphics clock controller driver for SM8150")
Signed-off-by: default avatarSatya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231122042814.4158076-1-quic_skakitap@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 1d506073

drivers/clk/qcom/gpucc-sm8150.c

+2 −2
Original line number Diff line number Diff line
@@ -37,8 +37,8 @@ static struct alpha_pll_config gpu_cc_pll1_config = { 
	.config_ctl_hi_val = 0x00002267,

	.config_ctl_hi1_val = 0x00000024,

	.test_ctl_val = 0x00000000,

	.test_ctl_hi_val = 0x00000002,

	.test_ctl_hi1_val = 0x00000000,

	.test_ctl_hi_val = 0x00000000,

	.test_ctl_hi1_val = 0x00000020,

	.user_ctl_val = 0x00000000,

	.user_ctl_hi_val = 0x00000805,

	.user_ctl_hi1_val = 0x000000d0,