Commit 6ef02656 authored by Nitin Gote's avatar Nitin Gote Committed by Tejas Upadhyay
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drm/xe: derive mem copy capability from graphics version



Drop .has_mem_copy_instr from the platform descriptors and set it
in xe_info_init() after handle_gmdid() populates graphics_verx100.
Centralizing the GRAPHICS_VER(xe) >= 20 check keeps MEM_COPY enabled
on Xe2+ and removes redundant per-platform plumbing.

Bspec: 57561

Fixes: 1e12dbae ("drm/xe/migrate: support MEM_COPY instruction")
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Suggested-by: default avatarMatthew Auld <matthew.auld@intel.com>
Signed-off-by: default avatarNitin Gote <nitin.r.gote@intel.com>
Link: https://patch.msgid.link/20260120054724.1982608-2-nitin.r.gote@intel.com


Signed-off-by: default avatarTejas Upadhyay <tejas.upadhyay@intel.com>
parent dc2fc00b
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+1 −5
Original line number Diff line number Diff line
@@ -350,7 +350,6 @@ static const struct xe_device_desc lnl_desc = {
	.has_display = true,
	.has_flat_ccs = 1,
	.has_pxp = true,
	.has_mem_copy_instr = true,
	.max_gt_per_tile = 2,
	.needs_scratch = true,
	.va_bits = 48,
@@ -375,7 +374,6 @@ static const struct xe_device_desc bmg_desc = {
	.has_pre_prod_wa = 1,
	.has_soc_remapper_telem = true,
	.has_sriov = true,
	.has_mem_copy_instr = true,
	.max_gt_per_tile = 2,
	.needs_scratch = true,
	.subplatforms = (const struct xe_subplatform_desc[]) {
@@ -392,7 +390,6 @@ static const struct xe_device_desc ptl_desc = {
	.has_display = true,
	.has_flat_ccs = 1,
	.has_sriov = true,
	.has_mem_copy_instr = true,
	.has_pre_prod_wa = 1,
	.has_pxp = true,
	.max_gt_per_tile = 2,
@@ -407,7 +404,6 @@ static const struct xe_device_desc nvls_desc = {
	.dma_mask_size = 46,
	.has_display = true,
	.has_flat_ccs = 1,
	.has_mem_copy_instr = true,
	.has_pre_prod_wa = 1,
	.max_gt_per_tile = 2,
	.require_force_probe = true,
@@ -705,7 +701,6 @@ static int xe_info_init_early(struct xe_device *xe,
	xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem;
	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
		desc->has_sriov;
	xe->info.has_mem_copy_instr = desc->has_mem_copy_instr;
	xe->info.skip_guc_pc = desc->skip_guc_pc;
	xe->info.skip_mtcfg = desc->skip_mtcfg;
	xe->info.skip_pcode = desc->skip_pcode;
@@ -896,6 +891,7 @@ static int xe_info_init(struct xe_device *xe,
	xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
	xe->info.has_usm = graphics_desc->has_usm;
	xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
	xe->info.has_mem_copy_instr = GRAPHICS_VER(xe) >= 20;

	xe_info_probe_tile_count(xe);

+0 −1
Original line number Diff line number Diff line
@@ -49,7 +49,6 @@ struct xe_device_desc {
	u8 has_llc:1;
	u8 has_mbx_power_limits:1;
	u8 has_mbx_thermal_info:1;
	u8 has_mem_copy_instr:1;
	u8 has_mert:1;
	u8 has_pre_prod_wa:1;
	u8 has_page_reclaim_hw_assist:1;