Unverified Commit 6efd8533 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Krzysztof Wilczyński
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dt-bindings: PCI: qcom,pcie-sm8450: Add 'global' interrupt 

Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt
to the host CPU. This interrupt can be used by the device driver to
identify events such as PCIe link specific events, safety events, etc...

Hence, document it in the binding along with the existing MSI interrupts.
Though adding a new interrupt will break the ABI, it is required to
accurately describe the hardware.

Link: https://lore.kernel.org/linux-pci/20240828-pci-qcom-hotplug-v4-10-263a385fbbcb@linaro.org


Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
parent bba1251e

Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml

+2 −2
Original line number Diff line number Diff line
@@ -21,11 +21,11 @@ properties: 


  interrupts:

    minItems: 1

    maxItems: 8

    maxItems: 9



  interrupt-names:

    minItems: 1

    maxItems: 8

    maxItems: 9



  iommu-map:

    minItems: 1

Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml

+6 −4
Original line number Diff line number Diff line
@@ -55,8 +55,8 @@ properties: 
      - const: aggre1 # Aggre NoC PCIe1 AXI clock



  interrupts:

    minItems: 8

    maxItems: 8

    minItems: 9

    maxItems: 9



  interrupt-names:

    items:
@@ -68,6 +68,7 @@ properties: 
      - const: msi5

      - const: msi6

      - const: msi7

      - const: global



  operating-points-v2: true

  opp-table:
@@ -149,9 +150,10 @@ examples: 
                         <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,

                         <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,

                         <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,

                         <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

                         <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,

                         <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;

            interrupt-names = "msi0", "msi1", "msi2", "msi3",

                              "msi4", "msi5", "msi6", "msi7";

                              "msi4", "msi5", "msi6", "msi7", "global";

            #interrupt-cells = <1>;

            interrupt-map-mask = <0 0 0 0x7>;

            interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */