Commit 6f119e3d authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'fpga-for-6.15-rc1' of...

Merge tag 'fpga-for-6.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga

 into char-misc-next

Xu writes:

FPGA Manager changes for 6.15-rc1

- Peter's change updates his email address.
- Kuhanh's change increases timeout for altera-cvp driver
- Arnd's change removes incorrect of_match_ptr

All patches have been reviewed on the mailing list, and have been in the
last linux-next releases (as part of our for-next branch).

Signed-off-by: default avatarXu Yilun <yilun.xu@intel.com>

* tag 'fpga-for-6.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga:
  fpga: versal: remove incorrect of_match_ptr annotation
  fpga: altera-cvp: Increase credit timeout
  fpga: m10bmc-sec: update email address for Peter Colberg
parents 124bb4e7 e19890a0
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+2 −2
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ Description: Read only. Returns the firmware version of Intel MAX10
What:		/sys/bus/.../drivers/intel-m10-bmc/.../mac_address
Date:		January 2021
KernelVersion:  5.12
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns the first MAC address in a block
		of sequential MAC addresses assigned to the board
		that is managed by the Intel MAX10 BMC. It is stored in
@@ -28,7 +28,7 @@ Description: Read only. Returns the first MAC address in a block
What:		/sys/bus/.../drivers/intel-m10-bmc/.../mac_count
Date:		January 2021
KernelVersion:  5.12
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns the number of sequential MAC
		addresses assigned to the board managed by the Intel
		MAX10 BMC. This value is stored in FLASH and is mirrored
+7 −7
Original line number Diff line number Diff line
What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
Date:		Sep 2022
KernelVersion:	5.20
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns the root entry hash for the static
		region if one is programmed, else it returns the
		string: "hash not programmed".  This file is only
@@ -11,7 +11,7 @@ Description: Read only. Returns the root entry hash for the static
What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
Date:		Sep 2022
KernelVersion:	5.20
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns the root entry hash for the partial
		reconfiguration region if one is programmed, else it
		returns the string: "hash not programmed".  This file
@@ -21,7 +21,7 @@ Description: Read only. Returns the root entry hash for the partial
What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
Date:		Sep 2022
KernelVersion:	5.20
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns the root entry hash for the BMC image
		if one is programmed, else it returns the string:
		"hash not programmed".  This file is only visible if the
@@ -31,7 +31,7 @@ Description: Read only. Returns the root entry hash for the BMC image
What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks
Date:		Sep 2022
KernelVersion:	5.20
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns a list of indices for canceled code
		signing keys for the static region. The standard bitmap
		list format is used (e.g. "1,2-6,9").
@@ -39,7 +39,7 @@ Description: Read only. Returns a list of indices for canceled code
What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks
Date:		Sep 2022
KernelVersion:	5.20
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns a list of indices for canceled code
		signing keys for the partial reconfiguration region. The
		standard bitmap list format is used (e.g. "1,2-6,9").
@@ -47,7 +47,7 @@ Description: Read only. Returns a list of indices for canceled code
What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_canceled_csks
Date:		Sep 2022
KernelVersion:	5.20
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns a list of indices for canceled code
		signing keys for the BMC.  The standard bitmap list format
		is used (e.g. "1,2-6,9").
@@ -55,7 +55,7 @@ Description: Read only. Returns a list of indices for canceled code
What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count
Date:		Sep 2022
KernelVersion:	5.20
Contact:	Peter Colberg <peter.colberg@intel.com>
Contact:	Peter Colberg <peter.colberg@altera.com>
Description:	Read only. Returns number of times the secure update
		staging area has been flashed.
		Format: "%u".
+1 −1
Original line number Diff line number Diff line
@@ -11871,7 +11871,7 @@ F: drivers/mfd/intel-m10-bmc*
F:	include/linux/mfd/intel-m10-bmc.h
INTEL MAX10 BMC SECURE UPDATES
M:	Peter Colberg <peter.colberg@intel.com>
M:	Peter Colberg <peter.colberg@altera.com>
L:	linux-fpga@vger.kernel.org
S:	Maintained
F:	Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
+1 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@
/* V2 Defines */
#define VSE_CVP_TX_CREDITS		0x49	/* 8bit */

#define V2_CREDIT_TIMEOUT_US		20000
#define V2_CREDIT_TIMEOUT_US		40000
#define V2_CHECK_CREDIT_US		10
#define V2_POLL_TIMEOUT_US		1000000
#define V2_USER_TIMEOUT_US		500000
+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ static struct platform_driver versal_fpga_driver = {
	.probe = versal_fpga_probe,
	.driver = {
		.name = "versal_fpga_manager",
		.of_match_table = of_match_ptr(versal_fpga_of_match),
		.of_match_table = versal_fpga_of_match,
	},
};
module_platform_driver(versal_fpga_driver);