Commit 6f9c4e69 authored by Michal Simek's avatar Michal Simek
Browse files

dt-bindings: firmware: xilinx: Describe missing child nodes 



Firmware node has more than fpga, aes and clock child nodes but also power,
reset, gpio, pinctrl and pcap which are not described yet.
All of them have binding in separate files but there is missing connection
to firmware node that's why describe it.

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1d7988cfadf3554d11f0779f96a670b4fd86ce5a.1703161663.git.michal.simek@amd.com


Signed-off-by: default avatarMichal Simek <michal.simek@amd.com>
parent 93b7a95f

Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml

+50 −0
Original line number Diff line number Diff line
@@ -47,6 +47,37 @@ properties: 
  "#power-domain-cells":

    const: 1



  gpio:

    $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#

    description: The gpio node describes connect to PS_MODE pins via firmware

      interface.

    type: object



  pcap:

    $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml

    description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to

      configure the Programmable Logic (PL). The configuration uses the

      firmware interface.

    type: object



  pinctrl:

    $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#

    description: The pinctrl node provides access to pinconfig and pincontrol

      functionality available in firmware.

    type: object



  power-management:

    $ref: /schemas/power/reset/xlnx,zynqmp-power.yaml#

    description: The zynqmp-power node describes the power management

      configurations. It will control remote suspend/shutdown interfaces.

    type: object



  reset-controller:

    $ref: /schemas/reset/xlnx,zynqmp-reset.yaml#

    description: The reset-controller node describes connection to the reset

      functionality via firmware interface.

    type: object



  versal-fpga:

    $ref: /schemas/fpga/xlnx,versal-fpga.yaml#

    description: Compatible of the FPGA device.
@@ -79,6 +110,25 @@ examples: 
    firmware {

      zynqmp_firmware: zynqmp-firmware {

        #power-domain-cells = <1>;

        gpio {

          compatible = "xlnx,zynqmp-gpio-modepin";

          gpio-controller;

          #gpio-cells = <2>;

        };

        pcap {

          compatible = "xlnx,zynqmp-pcap-fpga";

        };

        pinctrl {

          compatible = "xlnx,zynqmp-pinctrl";

        };

        power-management {

          compatible = "xlnx,zynqmp-power";

          interrupts = <0 35 4>;

        };

        reset-controller {

          compatible = "xlnx,zynqmp-reset";

          #reset-cells = <1>;

        };

      };

    };