Commit 6fb1867d authored by Bibo Mao's avatar Bibo Mao Committed by Huacai Chen
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LoongArch: KVM: Add interrupt checking for AVEC 



There is a newly added macro INT_AVEC with CSR ESTAT register, which is
bit 14 used for LoongArch AVEC support. AVEC interrupt status bit 14 is
supported with macro CSR_ESTAT_IS, so here replace the hard-coded value
0x1fff with macro CSR_ESTAT_IS so that the AVEC interrupt status is also
supported by KVM.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 3109d5ff

arch/loongarch/kvm/vcpu.c

+1 −1
Original line number Diff line number Diff line
@@ -311,7 +311,7 @@ static int kvm_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 
{

	int ret = RESUME_GUEST;

	unsigned long estat = vcpu->arch.host_estat;

	u32 intr = estat & 0x1fff; /* Ignore NMI */

	u32 intr = estat & CSR_ESTAT_IS;

	u32 ecode = (estat & CSR_ESTAT_EXC) >> CSR_ESTAT_EXC_SHIFT;



	vcpu->mode = OUTSIDE_GUEST_MODE;