Commit 6fb5ff63 authored by Horatiu Vultur's avatar Horatiu Vultur Committed by Jakub Kicinski
Browse files

phy: mscc: Fix parsing of unicast frames 



According to the 1588 standard, it is possible to use both unicast and
multicast frames to send the PTP information. It was noticed that if the
frames were unicast they were not processed by the analyzer meaning that
they were not timestamped. Therefore fix this to match also these
unicast frames.

Fixes: ab2bf933 ("net: phy: mscc: 1588 block initialization")
Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250726140307.3039694-1-horatiu.vultur@microchip.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 2da4def0

drivers/net/phy/mscc/mscc_ptp.c

+1 −0
Original line number Diff line number Diff line
@@ -900,6 +900,7 @@ static int vsc85xx_eth1_conf(struct phy_device *phydev, enum ts_blk blk, 
				     get_unaligned_be32(ptp_multicast));

	} else {

		val |= ANA_ETH1_FLOW_ADDR_MATCH2_ANY_MULTICAST;

		val |= ANA_ETH1_FLOW_ADDR_MATCH2_ANY_UNICAST;

		vsc85xx_ts_write_csr(phydev, blk,

				     MSCC_ANA_ETH1_FLOW_ADDR_MATCH2(0), val);

		vsc85xx_ts_write_csr(phydev, blk,

drivers/net/phy/mscc/mscc_ptp.h

+1 −0
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ 
#define MSCC_ANA_ETH1_FLOW_ADDR_MATCH2(x) (MSCC_ANA_ETH1_FLOW_ENA(x) + 3)

#define ANA_ETH1_FLOW_ADDR_MATCH2_MASK_MASK	GENMASK(22, 20)

#define ANA_ETH1_FLOW_ADDR_MATCH2_ANY_MULTICAST	0x400000

#define ANA_ETH1_FLOW_ADDR_MATCH2_ANY_UNICAST	0x200000

#define ANA_ETH1_FLOW_ADDR_MATCH2_FULL_ADDR	0x100000

#define ANA_ETH1_FLOW_ADDR_MATCH2_SRC_DEST_MASK	GENMASK(17, 16)

#define ANA_ETH1_FLOW_ADDR_MATCH2_SRC_DEST	0x020000