Commit 7016b300 authored by Vasant Hegde's avatar Vasant Hegde Committed by Joerg Roedel
Browse files

iommu/amd: Initialize iommu_device->max_pasids 



Commit 1adf3cc2 ("iommu: Add max_pasids field in struct iommu_device")
introduced a variable struct iommu_device.max_pasids to track max
PASIDS supported by each IOMMU.

Let us initialize this field for AMD IOMMU. IOMMU core will use this value
to set max PASIDs per device (see __iommu_probe_device()).

Also remove unused global 'amd_iommu_max_pasid' variable.

Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Reviewed-by: default avatarJerry Snitselaar <jsnitsel@redhat.com>
Link: https://lore.kernel.org/r/20230921092147.5930-15-vasant.hegde@amd.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent eda8c286

drivers/iommu/amd/amd_iommu_types.h

+0 −3
Original line number Diff line number Diff line
@@ -886,9 +886,6 @@ extern unsigned amd_iommu_aperture_order; 
/* allocation bitmap for domain ids */

extern unsigned long *amd_iommu_pd_alloc_bitmap;



/* Smallest max PASID supported by any IOMMU in the system */

extern u32 amd_iommu_max_pasid;



extern bool amd_iommu_force_isolation;



/* Max levels of glxval supported */

drivers/iommu/amd/init.c

+2 −7
Original line number Diff line number Diff line
@@ -185,8 +185,6 @@ static int amd_iommus_present; 
bool amd_iommu_np_cache __read_mostly;

bool amd_iommu_iotlb_sup __read_mostly = true;



u32 amd_iommu_max_pasid __read_mostly = ~0;



static bool amd_iommu_pc_present __read_mostly;

bool amdr_ivrs_remap_support __read_mostly;
@@ -2080,16 +2078,13 @@ static int __init iommu_init_pci(struct amd_iommu *iommu) 


	if (check_feature(FEATURE_GT)) {

		int glxval;

		u32 max_pasid;

		u64 pasmax;



		pasmax = amd_iommu_efr & FEATURE_PASID_MASK;

		pasmax >>= FEATURE_PASID_SHIFT;

		max_pasid  = (1 << (pasmax + 1)) - 1;



		amd_iommu_max_pasid = min(amd_iommu_max_pasid, max_pasid);

		iommu->iommu.max_pasids = (1 << (pasmax + 1)) - 1;



		BUG_ON(amd_iommu_max_pasid & ~PASID_MASK);

		BUG_ON(iommu->iommu.max_pasids & ~PASID_MASK);



		glxval   = amd_iommu_efr & FEATURE_GLXVAL_MASK;

		glxval >>= FEATURE_GLXVAL_SHIFT;