Commit 706136c5 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Jakub Kicinski
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net: ravb: Ensure memory write completes before ringing TX doorbell



Add a final dma_wmb() barrier before triggering the transmit request
(TCCR_TSRQ) to ensure all descriptor and buffer writes are visible to
the DMA engine.

According to the hardware manual, a read-back operation is required
before writing to the doorbell register to guarantee completion of
previous writes. Instead of performing a dummy read, a dma_wmb() is
used to both enforce the same ordering semantics on the CPU side and
also to ensure completion of writes.

Fixes: c156633f ("Renesas Ethernet AVB driver proper")
Cc: stable@vger.kernel.org
Co-developed-by: default avatarFabrizio Castro <fabrizio.castro.jz@renesas.com>
Signed-off-by: default avatarFabrizio Castro <fabrizio.castro.jz@renesas.com>
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://patch.msgid.link/20251017151830.171062-5-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 5370c31e
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+8 −0
Original line number Diff line number Diff line
@@ -2232,6 +2232,14 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev)
		dma_wmb();
		desc->die_dt = DT_FSINGLE;
	}

	/* Before ringing the doorbell we need to make sure that the latest
	 * writes have been committed to memory, otherwise it could delay
	 * things until the doorbell is rang again.
	 * This is in replacement of the read operation mentioned in the HW
	 * manuals.
	 */
	dma_wmb();
	ravb_modify(ndev, TCCR, TCCR_TSRQ0 << q, TCCR_TSRQ0 << q);

	priv->cur_tx[q] += num_tx_desc;