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KVM: arm64: GICv3: Set ICH_HCR_EL2.TDIR when interrupts overflow LR capacity
Now that we are ready to handle deactivation through ICV_DIR_EL1, set the trap bit if we have active interrupts outside of the LRs. Tested-by:Fuad Tabba <tabba@google.com> Signed-off-by:
Marc Zyngier <maz@kernel.org> Tested-by:
Mark Brown <broonie@kernel.org> Link: https://msgid.link/20251120172540.2267180-31-maz@kernel.org Signed-off-by:
Oliver Upton <oupton@kernel.org>