Commit 71be8020 authored by Gustavo Sousa's avatar Gustavo Sousa
Browse files

drm/i915/dmc_wl: Track INITIATE_PM_DMD_REQ for DC5 



The Bspec has been updated to include INITIATE_PM_DMD_REQ in the set of
register offsets that require the DMC wakelock for access during DC5.
Update our table accordingly.

Bspec: 71583
Reviewed-by: default avatarLuca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250203205941.251754-1-gustavo.sousa@intel.com


Signed-off-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
parent 67782bf6

drivers/gpu/drm/i915/display/intel_dmc_wl.c

+1 −0
Original line number Diff line number Diff line
@@ -102,6 +102,7 @@ static const struct intel_dmc_wl_range xe3lpd_dc5_dc6_dmc_ranges[] = { 
	{ .start = 0x42088 }, /* CHICKEN_MISC_3 */

	{ .start = 0x46160 }, /* CMTG_CLK_SEL */

	{ .start = 0x8f000, .end = 0x8ffff }, /* Main DMC registers */

	{ .start = 0x45230 }, /* INITIATE_PM_DMD_REQ */



	{},

};