Commit 723facbb authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'v6.8-rockchip-clk1' of... 

Merge tag 'v6.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

Two new pll rates and an additional critical clock on rk3568.

* tag 'v6.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3568: Mark pclk_usb as critical
  clk: rockchip: rk3568: Add PLL rate for 126.4MHz
  clk: rockchip: rk3568: Add PLL rate for 115.2MHz
parents b85ea95d 721bf080

drivers/clk/rockchip/clk-rk3568.c

+3 −0
Original line number Diff line number Diff line
@@ -77,7 +77,9 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = { 
	RK3036_PLL_RATE(200000000, 1, 100, 3, 4, 1, 0),

	RK3036_PLL_RATE(148500000, 1, 99, 4, 4, 1, 0),

	RK3036_PLL_RATE(135000000, 2, 45, 4, 1, 1, 0),

	RK3036_PLL_RATE(126400000, 1, 79, 5, 3, 1, 0),

	RK3036_PLL_RATE(119000000, 3, 119, 4, 2, 1, 0),

	RK3036_PLL_RATE(115200000, 1, 24, 5, 1, 1, 0),

	RK3036_PLL_RATE(108000000, 2, 45, 5, 1, 1, 0),

	RK3036_PLL_RATE(101000000, 1, 101, 6, 4, 1, 0),

	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
@@ -1592,6 +1594,7 @@ static const char *const rk3568_cru_critical_clocks[] __initconst = { 
	"hclk_php",

	"pclk_php",

	"hclk_usb",

	"pclk_usb",

	"hclk_vo",

};