Commit 727b179a authored by Timur Kristóf's avatar Timur Kristóf Committed by Alex Deucher
Browse files

drm/amd/display: Get maximum pixel clock from VBIOS



We will use this for validating the pixel clock when
an analog monitor is connected to VGA or DVI-I connectors.

For reference, see the legacy display code:
amdgpu_connector_vga_mode_valid

Signed-off-by: default avatarTimur Kristóf <timur.kristof@gmail.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7fb4f254
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+2 −0
Original line number Diff line number Diff line
@@ -441,6 +441,7 @@ static enum bp_result get_firmware_info_v1_4(
		le32_to_cpu(firmware_info->ulMinPixelClockPLL_Output) * 10;
	info->pll_info.max_output_pxl_clk_pll_frequency =
		le32_to_cpu(firmware_info->ulMaxPixelClockPLL_Output) * 10;
	info->max_pixel_clock = le16_to_cpu(firmware_info->usMaxPixelClock) * 10;

	if (firmware_info->usFirmwareCapability.sbfAccess.MemoryClockSS_Support)
		/* Since there is no information on the SS, report conservative
@@ -497,6 +498,7 @@ static enum bp_result get_firmware_info_v2_1(
	info->external_clock_source_frequency_for_dp =
		le16_to_cpu(firmwareInfo->usUniphyDPModeExtClkFreq) * 10;
	info->min_allowed_bl_level = firmwareInfo->ucMinAllowedBL_Level;
	info->max_pixel_clock = le16_to_cpu(firmwareInfo->usMaxPixelClock) * 10;

	/* There should be only one entry in the SS info table for Memory Clock
	 */
+1 −0
Original line number Diff line number Diff line
@@ -169,6 +169,7 @@ struct dc_firmware_info {
		uint32_t engine_clk_ss_percentage;
	} feature;

	uint32_t max_pixel_clock; /* in KHz */
	uint32_t default_display_engine_pll_frequency; /* in KHz */
	uint32_t external_clock_source_frequency_for_dp; /* in KHz */
	uint32_t smu_gpu_pll_output_freq; /* in KHz */