Commit 72b4db0f authored by Eric Huang's avatar Eric Huang Committed by Alex Deucher
Browse files

drm/amdgpu: new cache coherence change for Aldebaran 



To support new cache coherence HW on A+A platform mainly in KFD.

Signed-off-by: default avatarEric Huang <jinhuieric.huang@amd.com>
Reviewed-by: default avatarOak Zeng <Oak.Zeng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ff6885ac

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+28 −2
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#include "amdgpu_amdkfd.h"

#include "amdgpu_dma_buf.h"

#include <uapi/linux/kfd_ioctl.h>

#include "amdgpu_xgmi.h"



/* BO flag to indicate a KFD userptr BO */

#define AMDGPU_AMDKFD_USERPTR_BO (1ULL << 63)
@@ -405,6 +406,8 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem) 
	struct amdgpu_device *bo_adev = amdgpu_ttm_adev(mem->bo->tbo.bdev);

	bool coherent = mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_COHERENT;

	uint32_t mapping_flags;

	uint64_t pte_flags;

	bool snoop = false;



	mapping_flags = AMDGPU_VM_PAGE_READABLE;

	if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE)
@@ -414,7 +417,6 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem) 


	switch (adev->asic_type) {

	case CHIP_ARCTURUS:

	case CHIP_ALDEBARAN:

		if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {

			if (bo_adev == adev)

				mapping_flags |= coherent ?
@@ -426,12 +428,36 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem) 
				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;

		}

		break;

	case CHIP_ALDEBARAN:

		if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {

			if (bo_adev == adev) {

				mapping_flags |= AMDGPU_VM_MTYPE_RW;

				if (adev->gmc.xgmi.connected_to_cpu)

					snoop = true;

			} else {

				mapping_flags |= AMDGPU_VM_MTYPE_NC;

				if (amdgpu_xgmi_same_hive(adev, bo_adev))

					snoop = true;

			}

		} else {

			snoop = true;

			if (adev->gmc.xgmi.connected_to_cpu)

				/* system memory uses NC on A+A */

				mapping_flags |= AMDGPU_VM_MTYPE_NC;

			else

				mapping_flags |= coherent ?

					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;

		}

		break;

	default:

		mapping_flags |= coherent ?

			AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;

	}



	return amdgpu_gem_va_map_flags(adev, mapping_flags);

	pte_flags = amdgpu_gem_va_map_flags(adev, mapping_flags);

	pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;



	return pte_flags;

}



/* add_bo_to_vm - Add a BO to a VM

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+3 −0
Original line number Diff line number Diff line
@@ -1040,6 +1040,9 @@ static void gmc_v9_0_get_vm_pte(struct amdgpu_device *adev, 
	    !(*flags & AMDGPU_PTE_SYSTEM) &&

	    mapping->bo_va->is_xgmi)

		*flags |= AMDGPU_PTE_SNOOPED;



	if (adev->asic_type == CHIP_ALDEBARAN)

		*flags |= mapping->flags & AMDGPU_PTE_SNOOPED;

}



static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)