Unverified Commit 72e34b85 authored by Niklas Cassel's avatar Niklas Cassel Committed by Krzysztof Wilczyński
Browse files

PCI: dwc: endpoint: Fix advertised resizable BAR size 

The commit message in commit fc9a7704 ("PCI: designware-ep: Configure
Resizable BAR cap to advertise the smallest size") claims that it modifies
the Resizable BAR capability to only advertise support for 1 MB size BARs.

However, the commit writes all zeroes to PCI_REBAR_CAP (the register which
contains the possible BAR sizes that a BAR be resized to).

According to the spec, it is illegal to not have a bit set in
PCI_REBAR_CAP, and 1 MB is the smallest size allowed.

Set bit 4 in PCI_REBAR_CAP, so that we actually advertise support for a
1 MB BAR size.

Before:
        Capabilities: [2e8 v1] Physical Resizable BAR
                BAR 0: current size: 1MB
                BAR 1: current size: 1MB
                BAR 2: current size: 1MB
                BAR 3: current size: 1MB
                BAR 4: current size: 1MB
                BAR 5: current size: 1MB
After:
        Capabilities: [2e8 v1] Physical Resizable BAR
                BAR 0: current size: 1MB, supported: 1MB
                BAR 1: current size: 1MB, supported: 1MB
                BAR 2: current size: 1MB, supported: 1MB
                BAR 3: current size: 1MB, supported: 1MB
                BAR 4: current size: 1MB, supported: 1MB
                BAR 5: current size: 1MB, supported: 1MB

Fixes: fc9a7704 ("PCI: designware-ep: Configure Resizable BAR cap to advertise the smallest size")
Link: https://lore.kernel.org/linux-pci/20240307111520.3303774-1-cassel@kernel.org


Signed-off-by: default avatarNiklas Cassel <cassel@kernel.org>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <stable@vger.kernel.org> # 5.2
parent f3a29640

drivers/pci/controller/dwc/pcie-designware-ep.c

+6 −1
Original line number Diff line number Diff line
@@ -627,8 +627,13 @@ int dw_pcie_ep_init_complete(struct dw_pcie_ep *ep) 
		nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>

			PCI_REBAR_CTRL_NBAR_SHIFT;



		/*

		 * PCIe r6.0, sec 7.8.6.2 require us to support at least one

		 * size in the range from 1 MB to 512 GB. Advertise support

		 * for 1 MB BAR size only.

		 */

		for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)

			dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0);

			dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, BIT(4));

	}



	/*