Commit 73070a91 authored by Dhananjay Ugwekar's avatar Dhananjay Ugwekar Committed by Mario Limonciello
Browse files

cpufreq/amd-pstate: Do not attempt to clear MSR_AMD_CPPC_ENABLE



MSR_AMD_CPPC_ENABLE is a write once register, i.e. attempting to clear
it is futile, it will not take effect. Hence, return if disable (0)
argument is passed to the msr_cppc_enable()

Signed-off-by: default avatarDhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
Reviewed-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Reviewed-by: default avatarGautham R. Shenoy <gautham.shenoy@amd.com>
Link: https://lore.kernel.org/r/20241023102108.5980-3-Dhananjay.Ugwekar@amd.com


Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
parent 7fb463aa
Loading
Loading
Loading
Loading
+6 −0
Original line number Diff line number Diff line
@@ -311,6 +311,12 @@ static inline int msr_cppc_enable(bool enable)
	int ret, cpu;
	unsigned long logical_proc_id_mask = 0;

       /*
        * MSR_AMD_CPPC_ENABLE is write-once, once set it cannot be cleared.
        */
	if (!enable)
		return 0;

	if (enable == cppc_enabled)
		return 0;