Commit 73293222 authored by Serge Semin's avatar Serge Semin Committed by Thomas Bogendoerfer
Browse files

mips: cm: Convert __mips_cm_phys_base() to weak function 

Based on the design pattern utilized in the CM GCR base address getter
implementation, the platform-specific code is capable to re-define the
getter and re-use the weakly defined initial version. But since the
pattern hasn't been used for over 10 years and another similar case (CM
L2-sync only base address getter) has just been fixed, let's unify the
interface and convert it to a more traditional single weakly defined
method: mips_cm_phys_base() (see the link below for the discussion around
this).

Link: https://lore.kernel.org/linux-mips/20240215171740.14550-3-fancer.lancer@gmail.com


Signed-off-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 8bc8db2a

arch/mips/include/asm/mips-cm.h

+3 −4
Original line number Diff line number Diff line
@@ -22,16 +22,15 @@ extern void __iomem *mips_gcr_base; 
extern void __iomem *mips_cm_l2sync_base;



/**

 * __mips_cm_phys_base - retrieve the physical base address of the CM

 * mips_cm_phys_base - retrieve the physical base address of the CM

 *

 * This function returns the physical base address of the Coherence Manager

 * global control block, or 0 if no Coherence Manager is present. It provides

 * a default implementation which reads the CMGCRBase register where available,

 * and may be overridden by platforms which determine this address in a

 * different way by defining a function with the same prototype except for the

 * name mips_cm_phys_base (without underscores).

 * different way by defining a function with the same prototype.

 */

extern phys_addr_t __mips_cm_phys_base(void);

extern phys_addr_t mips_cm_phys_base(void);



/**

 * mips_cm_l2sync_phys_base - retrieve the physical base address of the CM

arch/mips/kernel/mips-cm.c

+1 −4
Original line number Diff line number Diff line
@@ -179,7 +179,7 @@ static char *cm3_causes[32] = { 
static DEFINE_PER_CPU_ALIGNED(spinlock_t, cm_core_lock);

static DEFINE_PER_CPU_ALIGNED(unsigned long, cm_core_lock_flags);



phys_addr_t __mips_cm_phys_base(void)

phys_addr_t __weak mips_cm_phys_base(void)

{

	unsigned long cmgcr;
@@ -198,9 +198,6 @@ phys_addr_t __mips_cm_phys_base(void) 
	return (cmgcr & MIPS_CMGCRF_BASE) << (36 - 32);

}



phys_addr_t mips_cm_phys_base(void)

	__attribute__((weak, alias("__mips_cm_phys_base")));



phys_addr_t __weak mips_cm_l2sync_phys_base(void)

{

	u32 base_reg;