Commit 732f2cb2 authored by Jonathan Cameron's avatar Jonathan Cameron
Browse files

iio: temp: ltc2983: Fix alignment for DMA safety



____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: f110f318 ("iio: temperature: Add support for LTC2983")
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: default avatarNuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-91-jic23@kernel.org
parent faa05ecb
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -204,11 +204,11 @@ struct ltc2983_data {
	u8 num_channels;
	u8 iio_channels;
	/*
	 * DMA (thus cache coherency maintenance) requires the
	 * DMA (thus cache coherency maintenance) may require the
	 * transfer buffers to live in their own cache lines.
	 * Holds the converted temperature
	 */
	__be32 temp ____cacheline_aligned;
	__be32 temp __aligned(IIO_DMA_MINALIGN);
};

struct ltc2983_sensor {